The Role As ASIC Director - Chip Lead in our Product Development team, you will be responsible for providing technical leadership to one or more Adaptive & Embedded Computing Group (AECG) device ...
The Role As ASIC Director - Chip Lead in our Product Development team, you will be responsible for providing technical leadership to one or more Adaptive & Embedded Computing Group (AECG) device ...
Chip Lead / ASIC Director
San Jose, CA · On-site
$217K/yr
The Role As ASIC Director - Chip Lead in our Product Development team, you will be responsible for providing technical leadership to one or more Adaptive & Embedded Computing Group (AECG) device ...
Chip Lead / ASIC Director
San Jose, CA · On-site
$217K/yr
The Role As ASIC Director - Chip Lead in our Product Development team, you will be responsible for providing technical leadership to one or more Adaptive & Embedded Computing Group (AECG) device ...
Key job responsibilities Strategic Advisory & Resource Planning Serve as a trusted advisor to the ASIC Director, driving clarity on priorities, resource allocation, and organizational strategy.
Key job responsibilities Strategic Advisory & Resource Planning Serve as a trusted advisor to the ASIC Director, driving clarity on priorities, resource allocation, and organizational strategy.
Key job responsibilities Strategic Advisory & Resource Planning Serve as a trusted advisor to the ASIC Director, driving clarity on priorities, resource allocation, and organizational strategy.
Key job responsibilities Strategic Advisory & Resource Planning Serve as a trusted advisor to the ASIC Director, driving clarity on priorities, resource allocation, and organizational strategy.
ASIC Design Verification Engineer
$115K - $135K/yr
At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable ... and run directed and constrained-random tests to verify design functionality. • Assist in ...
ASIC Design Verification Engineer
$115K - $135K/yr
At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable ... and run directed and constrained-random tests to verify design functionality. • Assist in ...
Principal ASIC Design Verification Engineer
$200K - $220K/yr
At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable ... and directed testing. • Create and review verification plans, functional coverage models ...
Principal ASIC Design Verification Engineer
$200K - $220K/yr
At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable ... and directed testing. • Create and review verification plans, functional coverage models ...
Key job responsibilities Strategic Advisory & Resource Planning Serve as a trusted advisor to the ASIC Director, driving clarity on priorities, resource allocation, and organizational strategy.
Key job responsibilities Strategic Advisory & Resource Planning Serve as a trusted advisor to the ASIC Director, driving clarity on priorities, resource allocation, and organizational strategy.
... directed testing, and assertion-based verification. • Create and enhance testbench components ... At ForwardEdge ASIC, you will work on challenging silicon programs with an experienced engineering ...
... directed testing, and assertion-based verification. • Create and enhance testbench components ... At ForwardEdge ASIC, you will work on challenging silicon programs with an experienced engineering ...
ASIC Engineer
San Jose, CA · On-site
$194K/yr
Permanent Direct Hire About the job: Senior ASIC Engineer San Jose, CA-onsite $230k Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC ...
Quick apply
ASIC Engineer
San Jose, CA · On-site
$194K/yr
Permanent Direct Hire About the job: Senior ASIC Engineer San Jose, CA-onsite $230k Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC ...
ASIC Engineer
San Jose, CA · On-site
$192K/yr
Permanent Direct Hire About the job: Senior ASIC Engineer San Jose, CA-onsite $230k Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC ...
ASIC Engineer
San Jose, CA · On-site
$192K/yr
Permanent Direct Hire About the job: Senior ASIC Engineer San Jose, CA-onsite $230k Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC ...
Asic Engineer
$167K/yr
Direct and interpret SI/PI extractions and simulations to validate and optimize package performance ... Solid understanding of ASIC chip and package co‑design principles. Additional Skills ...
Quick apply
Asic Engineer
$167K/yr
Direct and interpret SI/PI extractions and simulations to validate and optimize package performance ... Solid understanding of ASIC chip and package co‑design principles. Additional Skills ...
Asic Engineer
$167K/yr
Direct and interpret SI/PI extractions and simulations to validate and optimize package performance ... Solid understanding of ASIC chip and package co‑design principles. Additional Skills ...
Quick apply
Asic Engineer
$167K/yr
Direct and interpret SI/PI extractions and simulations to validate and optimize package performance ... Solid understanding of ASIC chip and package co‑design principles. Additional Skills ...
Technical Specialist- ASIC Design
$120K - $150K/yr
Highly motivated and able to work with little direct oversight in a collaborative environment ... of ASIC design desired. CANDIDATE MUST HAVE VERIFICATION Must have a Master''s degree to be ...
Technical Specialist- ASIC Design
$120K - $150K/yr
Highly motivated and able to work with little direct oversight in a collaborative environment ... of ASIC design desired. CANDIDATE MUST HAVE VERIFICATION Must have a Master''s degree to be ...
Senior ASIC Digital / DSP Design Engineer
$141K - $236K/yr
Experience in the direct design and verification of digital and mixed signal ASICs and DSP algorithms either in ASICs or FPGAs * Strong EE fundamentals with experience in ASIC Design, DSP, digital ...
Senior ASIC Digital / DSP Design Engineer
$141K - $236K/yr
Experience in the direct design and verification of digital and mixed signal ASICs and DSP algorithms either in ASICs or FPGAs * Strong EE fundamentals with experience in ASIC Design, DSP, digital ...
Reporting to the Senior Director, ASIC Engineering, you will manage a team and oversee the end-to-end design and development of high-performance ASICs, ensuring technical excellence, on-time project ...
Reporting to the Senior Director, ASIC Engineering, you will manage a team and oversee the end-to-end design and development of high-performance ASICs, ensuring technical excellence, on-time project ...
ASIC Design Engineer - Networking/ DPU/ AI Systems
Santa Clara, CA · On-site
$175K/yr
... direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the ... We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ...
ASIC Design Engineer - Networking/ DPU/ AI Systems
Santa Clara, CA · On-site
$175K/yr
... direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the ... We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ...
... direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the ... We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ...
... direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the ... We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ...
Senior ASIC Digital / DSP Design Engineer
Colorado Springs, CO · On-site
$141K - $236K/yr
Experience in the direct design and verification of digital and mixed signal ASICs and DSP algorithms either in ASICs or FPGAs * Strong EE fundamentals with experience in ASIC Design, DSP, digital ...
Senior ASIC Digital / DSP Design Engineer
Colorado Springs, CO · On-site
$141K - $236K/yr
Experience in the direct design and verification of digital and mixed signal ASICs and DSP algorithms either in ASICs or FPGAs * Strong EE fundamentals with experience in ASIC Design, DSP, digital ...
Reporting to the VP of ASIC Engineering,with direct exposure toexecutive leadership,this leaderwillmanagea team of talented design engineers anddrivefull-lifecycle development ofCornelisnext ...
Quick apply
Reporting to the VP of ASIC Engineering,with direct exposure toexecutive leadership,this leaderwillmanagea team of talented design engineers anddrivefull-lifecycle development ofCornelisnext ...
Senior ASIC AI Engineer
Santa Clara, CA · On-site
Direct experience with AI-driven development such as coding agents and Agentic workflows. Ability ... A good understanding of ASIC flow including RTL, verification, logic synthesis, timing analysis.
Senior ASIC AI Engineer
Santa Clara, CA · On-site
Direct experience with AI-driven development such as coding agents and Agentic workflows. Ability ... A good understanding of ASIC flow including RTL, verification, logic synthesis, timing analysis.
Asic Director information
See salary details
$26K - $43.5K
5% of jobs
$43.5K - $61K
8% of jobs
$61K - $78.5K
8% of jobs
$87.8K is the 25th percentile. Wages below this are outliers.
$78.5K - $96K
9% of jobs
$96K - $113.5K
10% of jobs
$113.5K - $131K
11% of jobs
The median wage is $131.8K / yr.
$131K - $148.5K
12% of jobs
$165.7K is the 75th percentile. Wages above this are outliers.
$148.5K - $166K
14% of jobs
$166K - $183.5K
12% of jobs
$183.5K - $201K
9% of jobs
$201K - $218.5K
4% of jobs
$26K
$131.5K
$218.5K
How much do asic director jobs pay per year?
What are ASIC Directors?
What is the difference between Asic Director vs Asic Engineer?
| Aspect | Asic Director | Asic Engineer |
|---|---|---|
| Credentials | Typically requires a Bachelor's or Master's in Electrical Engineering or Computer Engineering; leadership experience | Requires a Bachelor's or Master's in Electrical Engineering or Computer Engineering; technical expertise |
| Work Environment | Leadership roles overseeing teams, project management, strategic planning | Design, develop, and test ASIC chips; hands-on technical work |
| Industry Usage | Used in companies designing complex integrated circuits, often in senior or managerial contexts | Commonly employed in semiconductor companies, focusing on chip design and verification |
The main difference between an Asic Director and an Asic Engineer lies in their responsibilities and experience level. The Asic Director oversees teams and strategic projects, requiring leadership skills and experience, while the Asic Engineer focuses on technical design and development of ASIC chips. Both roles require similar educational backgrounds, but their scope and focus differ significantly.
What are the typical collaboration points between an ASIC Director and cross-functional teams during a project lifecycle?
What are the key skills and qualifications needed to thrive as an ASIC Director, and why are they important?

Full-time
Posted 28 days ago
Advanced Micro Devices rating
8.6
Based on 13 frontline employees who took The Breakroom Quiz
28th of 156 rated electronics manufacturers
Job description
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
The Role
As ASIC Director – Chip Lead in our Product Development team, you will be responsible for providing technical leadership to one or more Adaptive & Embedded Computing Group (AECG) device programs. You will have sign-off responsibility for the technical execution of device programs from conception & planning to release to manufacturing. Your leadership responsibilities will focus on problem solving in all aspects of the device development cycle including architecture, RTL, analog & custom design, design for test & manufacturing, verification, physical design & timing closure, physical verification, tapeout and post-silicon validation & qualification. When a problem does not clearly fall under the banner of one technical team or another it becomes the responsibility of the Chip Lead to bring expertise, experience and diplomacy together to coordinate a solution.
The Person
This position requires a wide breadth of understanding of and experience with ASIC design and development. It also requires strong interpersonal skills to resolve issues between highly skilled and experienced engineering colleagues. A successful candidate will work with senior silicon design engineers, architects, and micro-architects from a wide variety of technical teams. The candidate will be attuned to the overall goals and objectives of the program and employ excellent communication and problem-solving skills.
Qualifications
Experience required in ASIC Development Lifecycle.
FPGA technical experience is a huge plus
Experience in a leadership role with a semiconductor company
Master’s or PhD in Electrical Engineering,Computer Engineering, or related technical field
Post-silicon validation experience is a strong asset
Strong understanding of semiconductor industry and products. Experience working with Product Planning and Marketing teams is preferred.
Key Responsibilities
Chip Definition and Feasibility
Chip Definition and Feasibility – identify critical tradeoffs and architectural decisions
Advise on Feasibility including early estimates of Schedule, Cost, Size, Power, Floorplan,
and identify key implementation decisions
Serve as Engineering’s interface to Technical Marketing; ensuring the product meets customer needs and supports the required functions and usage modes
Define/identify new device specific functionality (with Marketing and Architecture)
When needed, negotiate for a new, new version or new variant of an IP (with the IP/COE Lead)
Be aware of devices and programs throughout the organization; foster engineering re-use
Help resolve issues and guide trade-offs that arise during any phase of the program but especially in Physical Design.
Execution
The Chip Lead works with one or more Program Managers:
The Program Manager tracks that IP and chip development milestones and deliverables are achieved as scheduled. The Chip Lead engages and resolves the problem when some aspect of the program is not meeting its planned objectives.
When engineering or marketing initiates a change to the program, the Chip Lead communicates the change and its consequences to all stakeholders.
#LI-G11
#LI-HYBRID
This role is not eligible for visa sponsorship.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Qualifications:Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Education:UNAVAILABLEEmployment Type: FULL_TIMEWhat Advanced Micro Devices employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Advanced Micro Devices (AMD)
Sourced by ZipRecruiter
Industry
Computer and electronic product manufacturing and manufacturing
Company size
5,001 - 10,000 Employees
Headquarters location
Sunnyvale, CA, US