Direct experience in custom ASIC, semi-custom silicon, foundry services, design services, or related silicon commercialization models. * Experience working with hyperscale, cloud, data center ...
Direct experience in custom ASIC, semi-custom silicon, foundry services, design services, or related silicon commercialization models. * Experience working with hyperscale, cloud, data center ...
Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
Support and deliver ASIC/Digital tool/flow/methodology solutions using Cadence tool suites to ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
Support and deliver ASIC/Digital tool/flow/methodology solutions using Cadence tool suites to ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
Senior FPGA Design Engineer
$122.10K - $168.30K/yr
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$122.10K - $168.30K/yr
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
$122.10K - $168.30K/yr
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
$122.10K - $168.30K/yr
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
DFT Application Engineer
Phoenix, AZ · On-site
Drive quality improvements in ASIC DFT/DFM and ATPG validation methodology, capability/flow, and ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
DFT Application Engineer
Phoenix, AZ · On-site
Drive quality improvements in ASIC DFT/DFM and ATPG validation methodology, capability/flow, and ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
DFT Application Engineer
Phoenix, AZ · On-site
Drive quality improvements in ASIC DFT/DFM and ATPG validation methodology, capability/flow, and ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
DFT Application Engineer
Phoenix, AZ · On-site
Drive quality improvements in ASIC DFT/DFM and ATPG validation methodology, capability/flow, and ... Direct customer engagement and technical leadership in advanced semiconductor design * Access to ...
DFT Application Engineer
Chandler, AZ · On-site
... ASIC DFT/DFM and ATPG validation methodology, capability/flow, and documentation for both block ... Direct customer engagement and technical leadership in advanced semiconductor design - Access to ...
DFT Application Engineer
Chandler, AZ · On-site
... ASIC DFT/DFM and ATPG validation methodology, capability/flow, and documentation for both block ... Direct customer engagement and technical leadership in advanced semiconductor design - Access to ...
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101.10K - $136.10K/yr
Director, Platforms FLSA Status: Exempt Last Modified: 9/10/2025 Level : T3 Location Chandler, AZ ... Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ...
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Senior FPGA Design Engineer
Chandler, AZ · On-site
$101.10K - $136.10K/yr
Director, Platforms FLSA Status: Exempt Last Modified: 9/10/2025 Level : T3 Location Chandler, AZ ... Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ...
Senior FPGA Engineer with Security Clearance
$101.10K - $136.10K/yr
Director, Platforms FLSA Status: Exempt Last Modified: 9/10/2025 Level: T3 Location: Chandler, AZ ... Qualifications • Strong digital design engineer with FPGA/ASIC SoC design experience • Strong ...
Senior FPGA Engineer with Security Clearance
$101.10K - $136.10K/yr
Director, Platforms FLSA Status: Exempt Last Modified: 9/10/2025 Level: T3 Location: Chandler, AZ ... Qualifications • Strong digital design engineer with FPGA/ASIC SoC design experience • Strong ...
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification * Strong proficiency ...
Senior Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification * Strong proficiency ...
Senior Staff Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...
Senior Staff Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...
Staff Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...
Staff Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...
Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...
Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Create directed and constrained-random test suites to ensure robust functional coverage ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...
Senior HW Project Engineer
Phoenix, AZ · On-site
$98.30K - $128.10K/yr
... ASIC design. Must have proven project engineering track record leading, coordinating and ... Prefer direct user experience with a requirement management database such as: IBM Rational DOORS ...
Senior HW Project Engineer
Phoenix, AZ · On-site
$98.30K - $128.10K/yr
... ASIC design. Must have proven project engineering track record leading, coordinating and ... Prefer direct user experience with a requirement management database such as: IBM Rational DOORS ...
Senior HW Project Engineer
Phoenix, AZ · On-site
$98.30K - $128.10K/yr
... ASIC design. Must have proven project engineering track record leading, coordinating and ... Prefer direct user experience with a requirement management database such as: IBM Rational DOORS ...
Senior HW Project Engineer
Phoenix, AZ · On-site
$98.30K - $128.10K/yr
... ASIC design. Must have proven project engineering track record leading, coordinating and ... Prefer direct user experience with a requirement management database such as: IBM Rational DOORS ...
Experience in ASIC or SoC development Preferred Qualifications: * Active US Government Security ... Direct customer engagement and technical leadership in advanced memory design * Access to Intel ...
Experience in ASIC or SoC development Preferred Qualifications: * Active US Government Security ... Direct customer engagement and technical leadership in advanced memory design * Access to Intel ...
Sr. HW Project Engineer
$98.30K - $128.10K/yr
... ASIC design. Must have proven project engineering track record leading, coordinating and ... Prefer direct user experience with a requirement management database such as: IBM Rational DOORS ...
Sr. HW Project Engineer
$98.30K - $128.10K/yr
... ASIC design. Must have proven project engineering track record leading, coordinating and ... Prefer direct user experience with a requirement management database such as: IBM Rational DOORS ...
Asic Director information
See Phoenix, AZ salary details
$25.3K - $42.3K
5% of jobs
$42.3K - $59.3K
8% of jobs
$59.3K - $76.3K
8% of jobs
$85.4K is the 25th percentile. Wages below this are outliers.
$76.3K - $93.3K
9% of jobs
$93.3K - $110.4K
10% of jobs
$110.4K - $127.4K
11% of jobs
The median wage is $128.1K / yr.
$127.4K - $144.4K
12% of jobs
$161.1K is the 75th percentile. Wages above this are outliers.
$144.4K - $161.4K
14% of jobs
$161.4K - $178.4K
12% of jobs
$178.4K - $195.4K
9% of jobs
$195.4K - $212.4K
4% of jobs
$25.3K
$127.9K
$212.4K
How much do asic director jobs pay per year?
What are the key skills and qualifications needed to thrive as an ASIC Director, and why are they important?
What are the typical collaboration points between an ASIC Director and cross-functional teams during a project lifecycle?
What are ASIC Directors?
What is the difference between Asic Director vs Asic Engineer?
| Aspect | Asic Director | Asic Engineer |
|---|---|---|
| Credentials | Typically requires a Bachelor's or Master's in Electrical Engineering or Computer Engineering; leadership experience | Requires a Bachelor's or Master's in Electrical Engineering or Computer Engineering; technical expertise |
| Work Environment | Leadership roles overseeing teams, project management, strategic planning | Design, develop, and test ASIC chips; hands-on technical work |
| Industry Usage | Used in companies designing complex integrated circuits, often in senior or managerial contexts | Commonly employed in semiconductor companies, focusing on chip design and verification |
The main difference between an Asic Director and an Asic Engineer lies in their responsibilities and experience level. The Asic Director oversees teams and strategic projects, requiring leadership skills and experience, while the Asic Engineer focuses on technical design and development of ASIC chips. Both roles require similar educational backgrounds, but their scope and focus differ significantly.
- Freelance Fpga Verification Engineer
- Remote Work From Home Analog Mixed Signal Design Engineer
- Director Asic Design
- Junior Fpga Verification Engineer
- Freelance Work From Home Analog Mixed Signal Design Engineer
- Asic Design Manager
- Design Verification Engineer
- Freelance Asic Verification Engineer
- Freelance Asic Design Engineer
Full-time
Medical, Retirement, PTO
Posted 14 days ago
Intel rating
8.8
Based on 143 frontline employees who took The Breakroom Quiz
9th of 137 rated electronics manufacturers
Job description
Intel is seeking a highly strategic Custom ASIC Sales Leader to build a global team of expert custom silicon and ASIC sales specialists focused on identifying, shaping, and winning custom opportunities with our largest and most strategic customers. This leader will define and execute a worldwide go-to-market motion for custom silicon engagements, align deeply with customer roadmaps, and translate complex market requirements into high-value custom silicon business opportunities for Intel.
The leader is expected to drive account planning and execution aligned with customer priorities and Intel's long-term growth objectives; consistent with Intel sales leadership expectations. This position is ideally located in the Bay Area in California, other locations may be considered based on candidate fit and business need.
Key Responsibilities
- Build, lead, and develop a high-performing global sales team of custom silicon sales specialists covering Intel's largest and most strategic accounts and opportunities.
- Define the global strategy for customer identification, prioritization, pursuit, and conversion of custom opportunities across targeted market segments.
- Establish executive-level relationships with key decision-makers across hyper-scalers, OEMs, automotive, communications, and other large-scale silicon buyers.
- Drive account planning and execution aligned to both customer priorities and Intel's long-term growth objectives.
- Partner closely with key internal partners and the executive leadership team to shape competitive, scalable, and profitable custom solutions.
- Lead complex deal strategy across long sales cycles, including customer discovery, solution definition, commercial negotiation, internal investment alignment, and business case development.
- Develop a disciplined global opportunity pipeline, forecast accuracy model, and governance cadence for custom silicon pursuits.
- Bring external market intelligence, competitive insight, and customer feedback into Intel's strategic planning and portfolio decisions.
- Influence internal roadmaps and engagement models to improve Intel's competitiveness in the custom ASIC and IC market.
- Serve as a senior external and internal ambassador for Intel's custom silicon portfolio.
- Demonstrated experience selling into large global customers and driving strategic account growth.
- Proven success managing long-cycle, highly technical, multi-stakeholder sales pursuits.
- Strong semiconductor industry network with pre-existing executive relationships, a common requirement in advanced semiconductor sales leadership roles.
Additional Job Requirements
- Deep knowledge of the ASIC market landscape, including customer decision criteria, competitive dynamics, and ecosystem partners; ASIC sales roles typically require strong technical semiconductor knowledge.
- Extensive network across the ASIC and broader semiconductor ecosystem, including IC design firms, platform companies, and enterprise technology buyers.
- Exceptional executive communication, negotiation, and selling skills.
- Strong financial and business acumen, including investment case development, margin analysis, and opportunity qualification.
- Ability to travel globally as needed to support customers, internal stakeholders, and team development.
- Ability to operate effectively in a matrixed, cross-functional, and fast-evolving business environment.
- High degree of strategic judgment, ownership, and bias for action.
- Comfortable with ambiguity and able to build structure, talent, and process in a growth-oriented environment.
Leadership Expectations
The successful candidate will be a builder, strategist, and enterprise leader. This person must combine external market credibility with internal cross-functional influence, and must be capable of creating a global operating rhythm that scales Intel ASIC opportunity creation and rapidly accelerates win rates across the globe. The role requires a leader who can hire exceptional talent, coach experienced sellers, and shape Intel's long-term position in the custom ASIC market.
Qualifications:Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
- 12+ years of semiconductor, ASIC, SoC, foundry, IP, or complex silicon solution sales experience.
- 5+ years of people management experience, including leading senior or specialist sales talent.
Preferred Qualifications
- MBA or advanced technical degree.
- Direct experience in custom ASIC, semi-custom silicon, foundry services, design services, or related silicon commercialization models.
- Experience working with hyperscale, cloud, data center, networking, automotive, or high-performance computing customers and executives.
- Strong understanding of semiconductor business models, including NRE structures, wafer supply considerations, packaging, yield, roadmap alignment, and lifecycle support.
- Experience building or scaling geographically distributed sales teams.
- Demonstrated ability to influence C-level and SVP-level stakeholders internally and externally.
- Track record of negotiating complex strategic agreements and structuring large, multi-year opportunities.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $454,230.00-641,270.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968