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Senior Asic Design Engineer Jobs in California (NOW HIRING)

Cisco

Senior ASIC Design Engineer

San Jose, CA · On-site

$167K - $245K/yr

Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC Design related experience, or Master's degree in Electrical or Computer engineering and 4+ years of ASIC Design related ...

Cisco

Senior ASIC Design Engineer

San Jose, CA · On-site

$167K - $245K/yr

Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC Design related experience, or Master's degree in Electrical or Computer engineering and 4+ years of ASIC Design related ...

Qualcomm

ASIC Design Engineer

San Diego, CA · On-site

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...

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Senior Asic Design Engineer information

See California salary details

$138.2K

$175.3K

$216.6K

How much do senior asic design engineer jobs pay per year?

As of Sep 1, 2026, the average yearly pay for senior asic design engineer in California is $175,327.00, according to ZipRecruiter salary data. Most workers in this role earn between $156,900.00 and $192,400.00 per year, depending on experience, location, and employer.

What does a senior ASIC design engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a senior ASIC design engineer?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What are some common challenges senior ASIC design engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are the most commonly searched types of Asic Design Engineer jobs in California?

The most popular types of Asic Design Engineer jobs in California are:

What are popular job titles related to Senior Asic Design Engineer jobs in California?

For Senior Asic Design Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Senior Asic Design Engineer jobs in California look for?

The top searched job categories for Senior Asic Design Engineer jobs in California are:

What cities in California are hiring for Senior Asic Design Engineer jobs?

Cities in California with the most Senior Asic Design Engineer job openings:

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Senior Asic Design Engineer jobs near you
Infographic showing various Senior Asic Design Engineer job openings in California as of August 2026, with employment types broken down into 88% Full Time, 10% Part Time, and 2% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $175,327 per year, or $84.3 per hour.

ASIC Design Engineer - Networking/ DPU/ AI Systems

Advanced Micro Devices, Inc

Santa Clara, CA • On-site

$175K/yr

Full-time

Re-posted 2 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 159 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE TEAM:
Our group, NTSG, develops advanced system solutions that combine ASIC, hardware, and software to enable next-generationAI networking workloads. We are building highly integrated, high-performance networking systems and are looking for experienced ASIC engineers to help drive development from architecture through production.
THE ROLE:
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development cycle - from RTL architectureanddesign through tapeout, silicon bring-up, and mass production.
THE PERSON:
We are seeking a Senior ASIC Design Engineer with seasonedexperience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development cycle - from RTL architectureanddesign through tapeout, silicon bring-up, and mass production.
KEY RESPONSIBILITIES:
  • Architect and design key blocks for next-generationDPU ASICstargeting AI networking workloads
  • Contribute across the full ASIC development lifecycle
    • architecture definition
    • microarchitecture and RTL design
    • design reviews
    • implementation support
    • tapeout
    • silicon bring-up
    • production ramp and mass deployment support
  • Collaborate on advanced network processing engines, including P4-based, protocol-independent packet processing solutions
  • Design and implement high-speed, complex ASIC blocks for networking and data movement applications
  • Work closely with verification, modeling, software, and hardware teams to ensure functional correctness and system-level performance
  • Debug and resolve issues across simulation, emulation, lab bring-up, and post-silicon phases
  • Contribute to performance, power, and area optimization
  • Support integration of ASIC IPs into larger SoC and system architectures
  • Produce high-quality design documentation and participate in technical reviews

REQUIRED QUALIFICATIONS:
  • Seasoned ASIC design experience
  • Proven hands-on experience developing high-speed, complex ASICs
  • Strong experience across the complete ASIC development cycle, fromRTL architecture to tapeout to massproduction
  • Solid background in networking and packet-processing architectures
  • Experience collaborating across:
    • Verification
    • Modeling
    • Software
    • Hardware/system teams
  • Strong RTL design skills in:
    • Verilog
    • SystemVerilog

  • Strong programming skills in:
    • C/C++
  • Scripting experience in:
    • Python
    • Tcl
    • Shell

PREFERRED QUALIFICATIONS:
  • Experience designing complex ARM- or RISC-V-based SoC ASICs
  • Hands-on experience building complex Network-on-Chip (NoC) architectures
  • Strong knowledge of AXI / AMBA protocols
  • Familiarity with P4, programmable packet-processing pipelines, or protocol-independent networking architectures
  • Experience with post-silicon debug, bring-up, and production support
  • Experience with high-performance interconnect, data movement, and SoC integration
  • Self-motivated engineer with strong ownership and execution skills
  • Strong problem-solving ability and willingness to take on new technical challenges
  • Continuous learner who thrives in a fast-moving environment
  • Excellent communication and cross-functional collaboration skills

ACADEMIC CREDENTIALS:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
LOCATION:
Santa Clara, CA
#LI-NP1
This role is not eligible for visa sponsorship.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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