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Senior Asic Design Engineer Jobs in San Ramon, CA

Sr. ASIC Design Engineer

San Jose, CA · On-site

$168 - $336/hr

  • Medical

  • Dental

  • Vision

  • PTO

Sr. ASIC Design Engineer Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. What's Encouraged Daily As ...

Senior ASIC Design Engineer

San Jose, CA · On-site +1

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Cornelis Networks is seeking talented Senior ASIC Design Engineers with deep expertise in one or more of the critical areas needed to develop world-class SoCs for deployment in high-performance ...

Senior ASIC Design Engineer

San Jose, CA · On-site

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Cornelis Networks is seeking talented Senior ASIC Design Engineers with deep expertise in one or more of the critical areas needed to develop world-class SoCs for deployment in high-performance ...

ASIC Engineer

San Jose, CA · On-site

$194K/yr

Senior ASIC Engineer San Jose, CA-onsite $230k Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC Design Engineer to join their growing ...

Senior ASIC Design Engineer

San Jose, CA

$167K - $245K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC Design related experience, or Master's degree in Electrical or Computer engineering and 4+ years of ASIC Design related ...

Senior ASIC Design Engineer

San Jose, CA · On-site

$167K - $245K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC Design related experience, or Master's degree in Electrical or Computer engineering and 4+ years of ASIC Design related ...

Sr. ASIC Design Engineer

San Jose, CA · On-site

$168K - $336K/yr

  • Medical

  • Dental

  • Vision

  • PTO

As a Senior ASIC Design Engineer and domain expert, you will perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing ...

ASIC Design Engineer

San Francisco, CA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

PCIe ASIC Design Engineer

San Jose, CA · On-site +1

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Cornelis Networks is hiringa Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into our next-generation SoCs. The ideal candidate will have deep expertise in PCI ...

PCIe ASIC Design Engineer

San Jose, CA · On-site

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Cornelis Networks is hiring a Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into our next-generation SoCs. The ideal candidate will have deep expertise in PCI ...

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Showing results 1-20

Senior Asic Design Engineer information

See San Ramon, CA salary details

$156.5K

$198.5K

$245.3K

How much do senior asic design engineer jobs pay per year?

As of Aug 18, 2026, the average yearly pay for senior asic design engineer in San Ramon, CA is $198,531.00, according to ZipRecruiter salary data. Most workers in this role earn between $177,700.00 and $217,900.00 per year, depending on experience, location, and employer.

What does a senior ASIC design engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a senior ASIC design engineer?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What are some common challenges senior ASIC design engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What job categories do people searching Senior Asic Design Engineer jobs in San Ramon, CA look for?

The top searched job categories for Senior Asic Design Engineer jobs in San Ramon, CA are:

What cities near San Ramon, CA are hiring for Senior Asic Design Engineer jobs?

Cities near San Ramon, CA with the most Senior Asic Design Engineer job openings:

Infographic showing various Senior Asic Design Engineer job openings in San Ramon, CA as of August 2026, with employment types broken down into 1% Internship, 82% Full Time, 12% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $198,531 per year, or $95.4 per hour.

Sr. ASIC Design Engineer

Micron Technology, Inc

San Jose, CA • On-site

$168 - $336/hr

Other

Medical, Dental, Vision, PTO

This job post has expired today. Applications are no longer accepted.


Micron Technology rating

8.6

Company rating: 8.6 out of 10

Based on 43 frontline employees who took The Breakroom Quiz

27th of 159 rated electronics manufacturers


Job description

Sr. ASIC Design Engineer

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence.

What’s Encouraged Daily

As a Senior ASIC Design Engineer and domain expert, you will perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing, linting, and CDC. Leverage GenAI and agentic tools to drive efficiency and execution excellence!

Minimum Qualifications
  • 5+ years of proven experience.
  • Bachelor’s degree in Electrical Engineering or Computer Science related major.
  • Hands‑on experience with GenAI, including development of agentic MCP and skill‑based tools.
  • Proficient in EDA tools and flows, including digital design, simulation, SystemVerilog, static timing analysis, synthesis, timing closure, and top‑level integration (clock and IO).
  • Knowledge of AI/LLMs and machine learning, as well as PCIe, NVMe, DRAM, NAND interfaces, AXI, CPU architecture, and bus protocols, is highly desirable.
Preferred Qualifications
  • Master’s degree in Electrical Engineering or Computer Science related majors.
  • Familiar with APR flow, DFT, LEC, CDC, and linting.
  • Strong collaboration skills and a creative, problem‑solving approach.
Job Profile(s)

ASIC Engineer 4 – ASIC Engineer 5

Relocation Level

TBD

Compensation

US base salary range: $168,000 – $336,000 per year. Additional compensation may include benefits, bonuses and equity.

Benefits

Micron offers medical, dental and vision plans, income protection benefits, paid family leave, a robust paid time‑off program and paid holidays.

Equal Employment Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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