Locum Asic Rtl Design Engineer Jobs (NOW HIRING)

General Information
Job Title
ASIC Digital Design, Sr Manager
Job ID
16218
City
Sunnyvale
State/Province
California
Date Posted
12-Mar-2026
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No
Base Salary Range: $204000 - $306000
Descriptions & Requirements
Job Description and Requirements
You Are:
You are an experienced ASIC Digital Design Manager with strong hands-on expertise in USB digital design and architecture, capable of leading a team while remaining deeply engaged in technical execution. You bring extensive experience defining and implementing RTL and micro-architecture for complex, high-speed interface IP, combined with proven team-lead and people-management skills.
You setting technical direction with your team, making architectural trade-offs, and driving design decisions . You are comfortable working directly with RTL, reviewing detailed design implementations, and guiding engineers through complex debug and convergence challenges. Your background includes exposure to USB or similar protocols.
As a experienced leader, you foster a culture of accountability, collaboration, and technical excellence. You mentor engineers through hands-on guidance and design reviews, communicate clearly across disciplines, and work closely with cross-functional teams to deliver high-quality, silicon-proven USB IP .
What You'll Be Doing:
Leading and managing a team of ASIC digital design engineers, providing day-to-day technical guidance, mentoring, and performance management.
• Owning USB digital architecture and RTL design execution, remaining hands-on while leading design efforts at block, subsystem, and IP-integration levels.
• Defining micro-architecture, design specifications, and implementation approaches for high-performance, power-efficient, and scalable PCIe designs.
• Leading end-to-end digital design activities, including architecture definition, RTL development, debug, design convergence, and post-silicon support.
• Planning and prioritizing design work, balancing hands-on technical involvement with team execution, schedules, and resource needs.
• Driving design quality through rigorous design reviews, coding standards, and RTL maintainability practices.
• Collaborating closely with verification, validation teams to ensure smooth IP integration and silicon success.
• Coaching and developing engineers through hands-on technical mentoring, design feedback, and career development discussions.
• Promoting a culture of technical ownership, accountability, and continuous improvement within the team.
• Identifying opportunities to improve AI- driven design methodologies, workflows, and productivity, while keeping focus on design execution.
• Communicating design status, technical risks, and trade-offs effectively to senior management and cross-functional stakeholders.
The Impact You Will Have:
• Deliver industry-leading USB digital IP with high performance, robustness, and scalability.
• Drive strong architectural and design execution for USB IP used by leading customers.
• Improve design quality, predictability, and execution efficiency through strong technical leadership.
• Build and lead a highly capable ASIC digital design team with deep USB expertise.
• Strengthen Synopsys' position as a leader in high-speed interface IP across commercial, enterprise, and automotive markets.
What You'll Need:
• Bachelor's degree in Electrical Engineering (BSEE) with 12+ years of experience, or Master's degree (MSEE) with 10+ years.
• Demonstrated experience as a team lead or people manager in an ASIC digital design environment.
• Extensive hands-on ASIC RTL design experience, with direct ownership of complex digital designs.
• Deep expertise in USB digital design and architecture or similar protocols.
• Strong understanding of ASIC design fundamentals including clocking, resets, low-power techniques, and design for test.
• Experience with AI-driven tools, flows and methodologies. Familiarity with scripting languages (Perl, TCL, Python) for design automation is a plus.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.