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Locum Asic Rtl Design Engineer Jobs in Ohio (NOW HIRING)

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ASIC Design Engineer - Power Conversion, Analog, & Solid‐State Fabrication Bleeding Edge Ohio Based Technology Firm, Newly Created Role, Tremendous Growth Opportunity: You will serve as the solo ...

... ASIC/FPGA/Hardware Engineer to work in our Columbus, Ohio location. "From Silicon to Systems" - We ... Perform and support digital circuit analysis throughout various stages of the design lifecycle (RTL ...

$80 - $120/hr

Design of analog and mixed-signal ASIC blocks in CMOS technology for innovative X-ray pixel detectors in collaboration with international partners * Contribute to establishing test strategies and ...

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Senior PCB Design & Layout Engineer - Power Management & High‐Voltage Systems Bleeding Edge Ohio ... Collaborate with ASIC engineers to integrate ASIC‐based power or analog blocks into PCB designs.

$120 - $160/hr

Deep knowledge of : + RTL design/simulation/verification + C/C++ Embedded programming + Python/other highlevel languages for modeling/automation + C-compilers and working with low-level and higher ...

FPGA Engineer

Cincinnati, OH · On-site

$124K - $160K/yr

ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A ... The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and ...

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Locum Asic Rtl Design Engineer information

What is the difference between Locum Asic Rtl Design Engineer vs Contract Asic Rtl Design Engineer?

AspectLocum Asic Rtl Design EngineerContract Asic Rtl Design Engineer
CredentialsTypically requires relevant engineering degrees and RTL design experienceSimilar credentials, often with specific RTL design certifications
Work EnvironmentTemporary, short-term assignments often in multiple locationsProject-based roles, usually in a fixed location or remote
Employer UsageUsed by agencies or companies needing immediate, short-term expertiseEngaged by companies or staffing agencies for project-specific work

Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Ohio?

The most popular types of Asic Rtl Design Engineer jobs in Ohio are:

What job categories do people searching Locum Asic Rtl Design Engineer jobs in Ohio look for?

The top searched job categories for Locum Asic Rtl Design Engineer jobs in Ohio are:

What cities in Ohio are hiring for Locum Asic Rtl Design Engineer jobs?

Cities in Ohio with the most Locum Asic Rtl Design Engineer job openings:

Senior ASIC Design Engineer, BSEE required, Solid-State Applications

Parma, OH • On-site

Innovative Technology Company focused on Essential Industry Customers

$125K - $165K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 4 days ago

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Job description

ASIC Design Engineer – Power Conversion, Analog, & Solid‐State Fabrication

Bleeding Edge Ohio Based Technology Firm, Newly Created Role, Tremendous Growth Opportunity:

You will serve as the solo ASIC Design Engineer owning architecture, transistor‐level design, simulation, verification, and delivery of custom ASICs focused on power/voltage conversion, battery‐powered systems, and pure analog circuitry. This role also requires meaningful experience with solid‐state fabrication, semiconductor process flows, and device‐level considerations that directly influence analog/power IC performance.

Core Responsibilities

Analog & Power ASIC Design

  • Own full lifecycle of ASIC development: architecture → transistor‐level design → simulation → verification → documentation → tape‐out.
  • Design advanced power conversion circuits, including:
    • Buck/boost converters
    • Charge pumps
    • Battery management ICs
    • Low‐voltage to high‐voltage conversion stages
    • Linear and switching regulators
  • Develop and integrate analog/power IP blocks (biasing networks, references, amplifiers, drivers, protection circuits).
  • Perform detailed SPICE simulations, corner analysis, Monte Carlo, aging, and reliability modeling.
  • Drive analog layout interactions: floorplanning, parasitic extraction, matching strategies, and sign‐off.

Solid‐State Fabrication & Semiconductor Process Interaction

  • Apply deep understanding of solid‐state device physics (MOSFET behavior, breakdown mechanisms, leakage, mobility, threshold tuning).
  • Work closely with foundries or internal process teams to align design with semiconductor process capabilities.
  • Interpret and utilize PDKs, process rules, and device models for optimal analog/power performance.
  • Incorporate fabrication‐driven constraints into design:
    • Doping profiles
    • Oxide thickness variations
    • High‐voltage device structures
    • Isolation techniques (trench, SOI, guard rings)
    • Thermal behavior and self‐heating
  • Evaluate how process variations impact analog stability, efficiency, noise, and power conversion accuracy.
  • Support tape‐out preparation, mask review, and post‐fabrication analysis.

Project Ownership

  • Act as the sole ASIC engineer driving design decisions, schedules, deliverables, and technical direction.
  • Interface with PCB, packaging, test, and system engineering teams to ensure seamless integration.
  • Produce clear specifications, design documentation, verification reports, and fab‐related design notes.

Required Experience & Skills

  • A College Degree (BS or MS) in Electrical Engineering, Computer Engineering or Physics.
  • 8+ years ASIC/Analog IC design experience.
  • Must have strong pure analog design experience — transistor‐level design, compensation, stability, noise, biasing.
  • Proven experience designing power conversion circuits and battery‐powered architectures.
  • Hands‐on expertise with Cadence (Virtuoso, Spectre, ADE).
  • Experience developing and integrating custom analog/power IP blocks.
  • Demonstrated ability to work as the solo ASIC designer on full projects.
  • Solid understanding of solid‐state fabrication, including:
    • CMOS/BiCMOS process flows
    • Device formation (implantation, diffusion, oxidation, deposition, lithography)
    • High‐voltage device structures
    • Process variation impacts on analog/power circuits
  • Strong grasp of semiconductor device physics and reliability mechanisms (BTI, HCI, TDDB).
  • Ability to translate system‐level requirements into ASIC specifications.

Preferred Qualifications

  • Experience with battery‐powered embedded systems, wearables, IoT, or portable electronics.
  • Familiarity with mixed‐signal verification methodologies.
  • Experience with lab bring‐up, bench validation, and silicon debug.
  • Background in wide‐bandgap devices (GaN, SiC) or high‐voltage analog design.

Role Attributes

  • Highly independent, self‐directed, and comfortable owning complex ASIC programs end‐to‐end.
  • Strong analog intuition and power‐focused design mindset.
  • Deep appreciation for how fabrication choices impact analog/power IC behavior.

Very Competitive Compensation and Benefits, Call or Apply Today!

Note: we can consider remote employees who are able to work in the office 12-times per year.

Company Description

Recession Resistant Business Model, Our Systems Stabilize and Support Highly Available Security Systems. Strong History of using our profits to build and design best of breed solutions for our essential industry customers. Collaborative-Team focused environment, History of Hiring very smart people with solid engineering skills, experience and education. Great Location, Terrific Culture, Competitive Salaries.