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Asic Engineer Jobs in Ohio (NOW HIRING)

Battelle

ASIC/FPGA/Hardware Engineer

Columbus, OH · On-site

Job Summary Battelle's Cyber Advanced Microsystem Solutions business unit is seeking early-career ASIC/FPGA/Hardware Engineer to work in our Columbus, Ohio location. "From Silicon to Systems" - We ...

Amarx Search, Inc.

Senior FPGA Engineer

Cincinnati, OH · On-site

$106K - $197K/yr

Senior FPGA Engineer * Please apply ONLY if you have extensive FPGA and Verilog experience United ... ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A ...

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All JobsAsic Engineer JobsAsic Engineer Jobs in Ohio

Asic Engineer information

See Ohio salary details

$78.4K

$150.4K

$159.2K

How much do asic engineer jobs pay per year?

As of Aug 5, 2026, the average yearly pay for asic engineer in Ohio is $150,442.00, according to ZipRecruiter salary data. Most workers in this role earn between $157,800.00 and $157,800.00 per year, depending on experience, location, and employer.

What does an ASIC engineer do?

An ASIC engineer designs, develops, and tests application-specific integrated circuits used in electronic devices. They work with hardware description languages like VHDL or Verilog, perform simulations, and collaborate with cross-functional teams to optimize chip performance and power consumption. Strong knowledge of digital logic, circuit design, and verification tools is essential for this role.

Are ASIC engineers in demand?

ASIC engineers are in high demand due to the growing need for custom integrated circuits in industries like telecommunications, consumer electronics, and automotive. Their expertise in hardware design, verification, and FPGA tools makes them valuable in developing efficient, specialized chips, with job growth expected to remain strong as technology advances.

What is an ASIC engineer?

An ASIC Engineer works with the design and verification of an Application-Specific Integrated Circuit (ASIC). This type of integrated circuit is designed for a specified purpose, like digital voice recording or cryptocurrency mining. An ASIC engineer has experience and skills that they use to program the integrated circuit based on defined requirements. They are capable of designing and producing ASICs that have over 100 million logic gates.

What are some typical challenges faced by ASIC engineers during the design and verification process?

ASIC Engineers often face challenges such as meeting tight performance, power, and area constraints while ensuring design correctness. Debugging complex issues during simulation and post-silicon validation can be time-consuming and require strong problem-solving skills. Additionally, coordinating with cross-functional teams—such as software, hardware, and verification engineers—is crucial to resolve integration issues and keep projects on schedule. Staying updated with evolving EDA tools and industry standards is also important for success in this role.

How much does an ASIC engineer make?

An ASIC engineer's salary typically ranges from $80,000 to $150,000 annually, depending on experience, location, and industry. Senior roles or those with specialized skills in hardware description languages and verification tools can earn higher compensation.

What is the difference between Asic Engineer vs FPGA Engineer?

AspectAsic EngineerFPGA Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or VLSI certificationsBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; similar certifications
Work EnvironmentDesigning and developing custom integrated circuits in labs or design centersImplementing and testing FPGA designs in labs or development environments
Industry UsageUsed in semiconductor companies, electronics manufacturers, and high-performance computingCommon in prototyping, testing, and flexible hardware solutions across industries

While both roles involve digital design and hardware development, Asic Engineers focus on creating custom chips for mass production, whereas FPGA Engineers work on programmable hardware for testing and rapid prototyping. The skills and certifications overlap, but their work environments and end goals differ significantly.

What are the key skills and qualifications needed to thrive as an ASIC engineer, and why are they important?

To thrive as an ASIC Engineer, you need a solid background in digital design, hardware description languages (HDLs) like Verilog or VHDL, and a relevant degree in electrical engineering or a related field. Familiarity with electronic design automation (EDA) tools, simulation software, and knowledge of the ASIC design flow are typically required, with certifications in hardware design being advantageous. Strong problem-solving abilities, attention to detail, and effective communication skills help set top performers apart. These skills are essential for delivering reliable, efficient chip designs while collaborating with cross-functional teams and meeting project specifications.
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What are popular job titles related to Asic Engineer jobs in OH? For Asic Engineer jobs in OH, the most frequently searched job titles are:
Asic Engineer jobs near you
Infographic showing various Asic Engineer job openings in Ohio as of July 2026, with employment types broken down into 4% As Needed, 90% Full Time, 4% Part Time, and 2% Contract. Highlights an 88% Physical, 7% Hybrid, and 5% Remote job distribution, with an average salary of $150,442 per year, or $72.3 per hour.

Associate, FPGA / ASIC Verification Engineer

L3HHCM20

Cincinnati, OH • On-site

$118K - $162K/yr

Other

Re-posted 5 days ago

Job description

Job Title: Associate, FPGA / ASIC Verification Engineer

Job Code:40384

Job Location: Cincinnati, OH 

Job Schedule: 4/10:Employees work 10 hour days, 4 days a week 

Job Description:

As an Associate ASIC/FPGA Verification Engineer at L3Harris you will be responsible for verifying the architecture, design and implementation of next generation Electronic Safe and Arm Devices utilizing the latest state of the art tools and technologies.

The ideal candidate for this role would share our passion for creating and innovating new technologies in a highly dynamic, fast-paced environment. We are looking for highly talented, motivated, and versatile engineers that can create the next generation fuzing solutions.

ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A interfaces, communication protocols, state machines, timer chains, etc. used in Electronic Safe and Arm Devices (Fuzes) for DOD weapon systems. Microchip/Microsemi Antifuse and Flash are our targeted FPGAs with occasional ASIC development, Siemens Mentor Graphics QuestaSim Prime is our simulation tool, and the System Verilog UVM framework is the current verification environment.  The primary responsibilities will focus on Verilog FPGA design verification, and the System Verilog UVM framework verification.

Essential Functions:

  • Analysis of the requirements, architecture definition, design and debug of FPGA and associated hardware and microcontroller products and associated firmware.
  • Developing Verilog HDL targeting Antifuse and enhanced Flash FPGAs.
  • Developing C# source code targeting enhanced Flash Microcontrollers.
  • Performing effective analysis of functional issues or performance profiling with the hardware and firmware in test environments or target host systems.
  • Contribute to process improvements to ensure hardware-firmware quality and time-to-market.

Qualifications:

  • To be eligible, applicants must be pursuing a bachelor's degree in electrical engineering, Electrical Engineering Technology, Computer Science or related field or have completed their bachelor's degree within the last 12 months, regardless of age.

Preferred Additional Skills:

  • Knowledge using Verilog for Logic Design.
  • Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus
  • Programming experience in C for embedded systems, including development of algorithms, manipulation of data structures, and implementing highly optimized code.
  • Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers.

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