ZipRecruiter

Log In

1

Telecommute Asic Rtl Design Engineer Jobs (NOW HIRING)

Qualcomm

Processor ASIC RTL Design Engineer

San Diego, CA · On-site

$127K - $190K/yr

Engineering Group, Engineering Group > DSP Architecture and Design General Summary: A variety of ... This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the ...

CYNET SYSTEMS

ASIC/RTL Design Engineer 2

San Jose, CA · On-site

$60 - $62/hr

Hands-on experience in industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure. * Working knowledge of Client cores and other I/O standard ...

ServerLogic

Senior ASIC Design Engineer

Beaverton, OR · On-site

Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Run LINT and CDC checks on the RTL code and fix accordingly. * Assist with synthesis and FPGA ...

TetraMem INC

ASIC RTL/SoC Design Engineer

Fremont, CA · On-site

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...

Normal Computing

RTL Design Engineer

New York, NY · On-site

$205K - $285K/yr

The Role As an RTL Design Engineer at Normal, you will design and verify the digital logic at the ... This work sits at the intersection of classical ASIC design, novel computing architectures, and a ...

TetraMem INC

ASIC RTL/SoC Design Engineer

Fremont, CA · On-site

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...

next page

Showing results 1-20

All JobsTelecommute Asic Rtl Design Engineer Jobs

Telecommute Asic Rtl Design Engineer information

See salary details

$94K

$150.2K

$202K

How much do telecommute asic rtl design engineer jobs pay per year?

As of Jul 10, 2026, the average yearly pay for telecommute asic rtl design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a Telecommute ASIC RTL Design Engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What cities are hiring for Telecommute Asic Rtl Design Engineer jobs? Cities with the most Telecommute Asic Rtl Design Engineer job openings:
What are the most commonly searched types of Asic Rtl Design Engineer jobs? The most popular types of Asic Rtl Design Engineer jobs are:
What states have the most Telecommute Asic Rtl Design Engineer jobs? States with the most job openings for Telecommute Asic Rtl Design Engineer jobs include:
Telecommute Asic Rtl Design Engineer jobs near you

RTL Engineer Networking ASIC Saratoga, CA Full-Time

VortexLink

Saratoga, CA • On-site

Other

Posted 12 days ago

Job description

RTL Engineer – Networking ASIC

Saratoga, CA
Full-Time

Join an innovative hardware company building next-generation Networking ASICs that power large-scale AI training and inference.

We are seeking experienced RTL Engineers to architect and implement high-performance networking chips focused on low latency, QoS, and scalability.

Responsibilities

  • Design packet buffering, queuing, and scheduling microarchitecture

  • Implement high-speed networking ASIC RTL (SystemVerilog/Verilog)

  • Optimize pipelined architectures for performance and latency

  • Support Ethernet, IP protocols, and high-speed interconnects (e.g., UCIe)

  • Collaborate with verification teams for testing and validation

Qualifications

  • BE/ME with 8–15 years of ASIC RTL design experience

  • Strong expertise in SystemVerilog & Verilog

  • Experience with scheduling, arbitration & QoS mechanisms

  • Solid understanding of ASIC design flow (simulation, synthesis, timing)

  • Background in Ethernet and IP networking protocols

If you’re passionate about building high-speed networking silicon for AI infrastructure, apply today.

Apply