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Telecommute Asic Rtl Design Engineer Jobs (NOW HIRING)

TetraMem INC

ASIC RTL/SoC Design Engineer

Fremont, CA · On-site

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...

Synopsys

ASIC Digital Design, Sr Manager

Sunnyvale, CA · On-site +1

$204K - $306K/yr

... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ... Leading and managing a team of ASIC digital design engineers, providing daytoday technical guidance ...

CyberCoders

Design Engineer

San Jose, CA · On-site

Design Engineer We are an established semiconductor company focused on storage related product ... What You Need for this Position - OVM / UVM - SOC - ASIC - RTL - Logic Design - Front End - Digital ...

Micron Technology

RTL Design Engineer

Boise, ID · On-site

$129.40K/yr

Job Summary Micron Technology seeks an RTL Build Engineer to develop DRAM digital blocks from ... Strong understanding of ASIC front-end flows including RTL design, synthesis, and static timing ...

Etched

RTL Design Engineer

Cupertino, CA · On-site

$2K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...

Etched

RTL Design Engineer

Cupertino, CA · On-site

$2K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...

Etech Hi

ASIC / VLSI Engineers

Milpitas, CA

ASIC / VLSI ENGINEERS - RTL / STA / PD / DV (Senior Level) We are hiring 4 experienced ASIC / VLSI ... RTL Engineer (Networking / Ethernet) * STA Engineer * Physical Design Engineer * Design ...

Micron

RTL Design Engineer

Boise, ID · On-site

$129.40K/yr

Job Summary Micron Technology seeks an RTL Build Engineer to develop DRAM digital blocks from ... Strong understanding of ASIC front-end flows including RTL design, synthesis, and static timing ...

Google

TPU RTL Design Engineer

Sunnyvale, CA · On-site

$159.60K/yr

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...

Synopsys

ASIC Digital Design, Architect - 15036

Austin, TX · On-site

$181K - $271K/yr

... 2026 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote ... Defining and developing ASIC RTL design and verification at both chip and block levels. * Creating ...

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Telecommute Asic Rtl Design Engineer information

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$94K

$150.2K

$202K

How much do telecommute asic rtl design engineer jobs pay per year?

As of May 30, 2026, the average yearly pay for telecommute asic rtl design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What is a Telecommute ASIC RTL Design Engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

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Telecommute Asic Rtl Design Engineer jobs near you
Infographic showing various Telecommute Asic Rtl Design Engineer job openings in the United States as of May 2026, with employment types broken down into 2% As Needed, 12% Full Time, 72% Part Time, 2% Temporary, 10% Nights, and 2% Summer. Highlights an 100% Hybrid job distribution, with an average salary of $150,195 per year, or $72.2 per hour.
ASIC RTL/SoC Design Engineer

ASIC RTL/SoC Design Engineer

TetraMem INC

Fremont, CA • On-site

Full-time

Medical, Retirement, PTO

Posted 21 days ago

Job description

Company Description

TetraMem is a fast-growing well-funded startup company working on the next generation of computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware.

We offer a very competitive compensation, commensurate with experience, and a full benefits package including medical, professional PTO, 401k, and other perks.

Job Description

  • Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs.

  • Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility.

  • Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs.

  • Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout.

  • Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and/or in-memory computing applications.

  • Provide crucial support for Post-Si testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product.

  • Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to foster their professional growth.

  • Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability.

  • Stay up-to-date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency.

  • Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery.

Qualifications

  • MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design

  • Experience with Verilog and system Verilog

  • Experience with VCS, Verdi or other industry standard tools

  • Experience with pre-layout simulation and post-layout simulation

  • Understanding of the design flow. Ability to work with the backend team

  • Familiarity with AMBA APB AXI Protocol

  • Familiarity with RISC/Arm or other core architectures

  • Ability to create innovative architecture and solutions to customer requirements

  • Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.

Experience in one or more of the following areas considered a strong plus:

  • FPGA/ASIC design of image processing systems

  • Working knowledge of SoC architecture such as CPU, GPU or accelerators

  • Familiarity with: UVM, place-and-route, STA, EM/IR/Power

Additional Information

All your information will be kept confidential according to EEO guidelines.

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