Hardware Engineer
Chicago, IL · On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
Chicago, IL · On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Jr. ASIC Design Engineer
Batavia, IL · On-site
$70K - $93K/yr
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...
Jr. ASIC Design Engineer
Batavia, IL · On-site
$70K - $93K/yr
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
FPGA/ASIC ENGINEER
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...
FPGA/ASIC ENGINEER
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...
Digital - SerDes Digital Design Lead
Mundelein, IL · On-site
$138K/yr
... Engineering, or related fields * 12+ years of experience in digital design of high-speed SerDes, PHY, or transceiver IPs with proven tapeout experience at 112G PAM4 or higher data rates * Strong RTL ...
Quick apply
Digital - SerDes Digital Design Lead
Mundelein, IL · On-site
$138K/yr
... Engineering, or related fields * 12+ years of experience in digital design of high-speed SerDes, PHY, or transceiver IPs with proven tapeout experience at 112G PAM4 or higher data rates * Strong RTL ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
PD - IP Lead - Sr Staff, Physical Design
Mundelein, IL · On-site
$138K - $142K/yr
As an Eliyan Sr Staff / Principal Physical Design Engineer, you will be working at a fast-paced ... You will drive the development of cutting-edge ASICs from RTL to GDSII. You will work with a cross ...
Quick apply
PD - IP Lead - Sr Staff, Physical Design
Mundelein, IL · On-site
$138K - $142K/yr
As an Eliyan Sr Staff / Principal Physical Design Engineer, you will be working at a fast-paced ... You will drive the development of cutting-edge ASICs from RTL to GDSII. You will work with a cross ...
Lead Design Engineer
Cary, IL · On-site
$104K - $136K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Lead Design Engineer
Cary, IL · On-site
$104K - $136K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Design Engineer
Mossville, IL · On-site
$113K - $131K/yr
Telecommuting: 2 days/week. Up to 10% domestic travel to Caterpillar facilities to support controls ... Design Engineer / R0000379543 ] . #LI-DNI Visa Sponsorship is not available for this position.
Design Engineer
Mossville, IL · On-site
$113K - $131K/yr
Telecommuting: 2 days/week. Up to 10% domestic travel to Caterpillar facilities to support controls ... Design Engineer / R0000379543 ] . #LI-DNI Visa Sponsorship is not available for this position.
Principal Design Engineer
Cary, IL · On-site
$136K - $253K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Principal Design Engineer
Cary, IL · On-site
$136K - $253K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Senior FPGA Engineer: Low-Latency SoC Focus (Chicago)
Chicago, IL · On-site
$134K - $172K/yr
The ideal candidate will have a solid background in hardware engineering, experience with RTL design, and the ability to manage projects independently through the development lifecycle. This position ...
Senior FPGA Engineer: Low-Latency SoC Focus (Chicago)
Chicago, IL · On-site
$134K - $172K/yr
The ideal candidate will have a solid background in hardware engineering, experience with RTL design, and the ability to manage projects independently through the development lifecycle. This position ...
... RTL design and verification through synthesis, place-and-route, timing, power, signoff, and ... Define and report KPIs - cycle-time reduction, engineer-hours saved, iteration count, first-pass ...
... RTL design and verification through synthesis, place-and-route, timing, power, signoff, and ... Define and report KPIs - cycle-time reduction, engineer-hours saved, iteration count, first-pass ...
PD - Sr Staff -- CAD & Design Methodology \u007C RTL-to-GDSII Flow \u007C Advanced Node Methodology
Mundelein, IL · On-site
ABOUT THE ROLE As a Sr Staff / Principal CAD & Design Methodology Engineer , you will be the technical architect of RTL-to-GDSII flows and digital design infrastructure for advanced SoC products. You ...
Quick apply
PD - Sr Staff -- CAD & Design Methodology \u007C RTL-to-GDSII Flow \u007C Advanced Node Methodology
Mundelein, IL · On-site
ABOUT THE ROLE As a Sr Staff / Principal CAD & Design Methodology Engineer , you will be the technical architect of RTL-to-GDSII flows and digital design infrastructure for advanced SoC products. You ...
Engineering Project Manager
Batavia, IL · On-site
$175K - $200K/yr
Create readable, synthesizable, maintainable RTL in Verilog or System Verilog * Interpret device ... Familiarity with industry standard ASIC design tools: * Synopsys (DC, Primetime) * Cadence Suite ...
Quick apply
Engineering Project Manager
Batavia, IL · On-site
$175K - $200K/yr
Create readable, synthesizable, maintainable RTL in Verilog or System Verilog * Interpret device ... Familiarity with industry standard ASIC design tools: * Synopsys (DC, Primetime) * Cadence Suite ...
As an Eliyan Principal Physical Design Engineer, you will be working at a fast-paced early-stage ... You will drive the development of cutting-edge ASICs from RTL to GDSII. You will work with a cross ...
Quick apply
As an Eliyan Principal Physical Design Engineer, you will be working at a fast-paced early-stage ... You will drive the development of cutting-edge ASICs from RTL to GDSII. You will work with a cross ...
Junior FPGA Developer
Chicago, IL · On-site
$100 - $175/hr
Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...
Junior FPGA Developer
Chicago, IL · On-site
$100 - $175/hr
Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...
Junior FPGA Developer
Chicago, IL · On-site
Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...
Junior FPGA Developer
Chicago, IL · On-site
Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...
Telecommute Asic Rtl Design Engineer information
What is a telecommute ASIC RTL design engineer?
A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.
What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?
To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.
What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?
Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.
What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?
| Aspect | Telecommute Asic Rtl Design Engineer | Telecommute Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL coding | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design |
| Work Environment | Remote, primarily designing RTL code for ASICs | Remote, focusing on digital IC architecture and design |
| Industry Usage | Common in semiconductor and electronics companies |
Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Illinois?
The most popular types of Asic Rtl Design Engineer jobs in Illinois are:
What cities in Illinois are hiring for Telecommute Asic Rtl Design Engineer jobs?
Cities in Illinois with the most Telecommute Asic Rtl Design Engineer job openings:
Hardware Engineer
Chicago, IL • On-site
$127K - $168K/yr
Other
PTO
Re-posted 3 days ago
Job description
IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next generation of custom ASICs that power our trading infrastructure.
As a member of the Global Hardware organization, you'll work on long-term, high-impact engineering challenges that directly influence the performance and scalability of IMC's trading systems. This team focuses on designing proprietary hardware solutions that deliver meaningful advantages in latency-sensitive environments, partnering closely with software engineers, researchers, and trading teams to solve complex technical problems.
This role combines hardware design, verification, and system-level thinking. You'll contribute across the ASIC development lifecycle, from RTL design and validation to integration within larger hardware platforms. Because of the team's size and collaborative culture, engineers have broad ownership and exposure to multiple aspects of the design process rather than being confined to a narrow specialization.
What You'll Do
ASIC Design & Development
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture and commitment to continuous innovation.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Salary Range
$200,000-$225,000 USD
About Us
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture, and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies, and from developing an innovative research environment to diversifying our trading strategies, we dare to continuously innovate and collaborate to succeed.
As a member of the Global Hardware organization, you'll work on long-term, high-impact engineering challenges that directly influence the performance and scalability of IMC's trading systems. This team focuses on designing proprietary hardware solutions that deliver meaningful advantages in latency-sensitive environments, partnering closely with software engineers, researchers, and trading teams to solve complex technical problems.
This role combines hardware design, verification, and system-level thinking. You'll contribute across the ASIC development lifecycle, from RTL design and validation to integration within larger hardware platforms. Because of the team's size and collaborative culture, engineers have broad ownership and exposure to multiple aspects of the design process rather than being confined to a narrow specialization.
What You'll Do
ASIC Design & Development
- Participate in the full ASIC development lifecycle, from specification through integration and deployment
- Design and implement RTL for next-generation ASIC platforms using SystemVerilog
- Contribute to architecture and design discussions for performance-critical hardware systems
- Develop new functionality that supports evolving trading and infrastructure requirements
- Collaborate with hardware, software, and research teams to translate requirements into scalable solutions
- Develop unit tests and verification environments for RTL designs
- Validate functionality and performance of hardware components
- Debug design and integration issues throughout the development process
- Contribute to verification methodologies and testing infrastructure
- Ensure designs meet reliability, performance, and maintainability requirements
- Develop scripts and tooling to improve engineering workflows
- Support automation efforts across design and verification processes
- Contribute to continuous improvements in development methodologies and engineering practices
- BS+ in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline
- Strong experience with RTL design and development using SystemVerilog
- Strong understanding of digital design fundamentals
- Working knowledge of C++
- Experience developing and executing verification and test strategies
- Experience working with multi-clock-domain designs and clock-domain crossing concepts
- Solid understanding of Ethernet protocols and networking fundamentals
- Experience with Python, Bash, or similar scripting languages
- Strong debugging and problem-solving skills
- Ability to collaborate effectively across multiple engineering disciplines
- ASIC development experience
- FPGA development experience with relevant ASIC design exposure
- Familiarity with PMA (Physical Media Attachment) technologies
- Experience with high-performance networking systems
- Experience designing low-latency or performance-sensitive systems
- Exposure to trading, market infrastructure, or financial technology environments
- Experience building verification frameworks or test automation tools
- Strong C++ development skills
- Balances architecture-level thinking with hands-on implementation
- Enjoys solving difficult technical problems across hardware and software domains
- Takes ownership of systems and follows through from design to deployment
- Demonstrates strong attention to detail and engineering rigor
- Thrives in collaborative environments and works well across teams
- Learns quickly and adapts to evolving technical challenges
- Communicates clearly and effectively with both technical and non-technical stakeholders
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture and commitment to continuous innovation.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Salary Range
$200,000-$225,000 USD
About Us
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture, and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies, and from developing an innovative research environment to diversifying our trading strategies, we dare to continuously innovate and collaborate to succeed.