Hardware Engineer
Chicago, IL · On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
Chicago, IL · On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Hardware Engineer
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Jr. ASIC Design Engineer
Batavia, IL · On-site
$70K - $93K/yr
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...
Jr. ASIC Design Engineer
Batavia, IL · On-site
$70K - $93K/yr
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...
Design Verification Engineer
Chicago, IL · On-site
$140K - $171K/yr
... ASIC/SoC verification workflows and testbench architecture ... In this role, you will act as the vital link between our RTL design teams, system architects, and ...
Design Verification Engineer
Chicago, IL · On-site
$140K - $171K/yr
... ASIC/SoC verification workflows and testbench architecture ... In this role, you will act as the vital link between our RTL design teams, system architects, and ...
... ASIC design experience. Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power ...
... ASIC design experience. Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
FPGA/ASIC ENGINEER
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...
FPGA/ASIC ENGINEER
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
Lead Design Engineer
Cary, IL · On-site
$104K - $136K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Lead Design Engineer
Cary, IL · On-site
$104K - $136K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Design Engineer I
Cary, IL · On-site
$88K - $165K/yr
As such we are seeking an experienced DFT engineer which role will span across the full spectrum of ... Collaborate with RTL, verification, physical design and operation teams. Qualifications: * BS ...
Design Engineer I
Cary, IL · On-site
$88K - $165K/yr
As such we are seeking an experienced DFT engineer which role will span across the full spectrum of ... Collaborate with RTL, verification, physical design and operation teams. Qualifications: * BS ...
Principal Design Engineer
Cary, IL · On-site
$136K - $253K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Principal Design Engineer
Cary, IL · On-site
$136K - $253K/yr
Interface with Front End RTL design teams and Back End Verification teams Position Requirements/Qualifications:
Senior FPGA Engineer: Low-Latency SoC Focus (Chicago)
Chicago, IL · On-site
$134K - $172K/yr
The ideal candidate will have a solid background in hardware engineering, experience with RTL design, and the ability to manage projects independently through the development lifecycle. This position ...
Senior FPGA Engineer: Low-Latency SoC Focus (Chicago)
Chicago, IL · On-site
$134K - $172K/yr
The ideal candidate will have a solid background in hardware engineering, experience with RTL design, and the ability to manage projects independently through the development lifecycle. This position ...
... RTL design and verification through synthesis, place-and-route, timing, power, signoff, and ... Define and report KPIs - cycle-time reduction, engineer-hours saved, iteration count, first-pass ...
... RTL design and verification through synthesis, place-and-route, timing, power, signoff, and ... Define and report KPIs - cycle-time reduction, engineer-hours saved, iteration count, first-pass ...
Senior Staff Digital Design (FPGA) Engineer - Rolling Meadows, IL
Rolling Meadows, IL · On-site
$130K - $160K/yr
... join our dynamic engineering team. In this role, you will be instrumental in designing ... Design and implement complex FPGA designs including requirements analysis, specification, RTL ...
Senior Staff Digital Design (FPGA) Engineer - Rolling Meadows, IL
Rolling Meadows, IL · On-site
$130K - $160K/yr
... join our dynamic engineering team. In this role, you will be instrumental in designing ... Design and implement complex FPGA designs including requirements analysis, specification, RTL ...
Mechanical Design Engineer
Goodfield, IL · On-site
$72K - $97K/yr
Generate and maintain detailed CAD models and engineering drawings. * Support prototype builds and ... This is a temporary position expected to last through the end of the calendar year.
Mechanical Design Engineer
Goodfield, IL · On-site
$72K - $97K/yr
Generate and maintain detailed CAD models and engineering drawings. * Support prototype builds and ... This is a temporary position expected to last through the end of the calendar year.
Mechanical Design Engineer
Goodfield, IL · On-site
$72K - $97K/yr
Generate and maintain detailed CAD models and engineering drawings. * Support prototype builds and ... This is a temporary position expected to last through the end of the calendar year.
Mechanical Design Engineer
Goodfield, IL · On-site
$72K - $97K/yr
Generate and maintain detailed CAD models and engineering drawings. * Support prototype builds and ... This is a temporary position expected to last through the end of the calendar year.
Design Engineer (Solidworks)
Gurnee, IL · On-site
$34 - $38.50/hr
Design Engineer This role focuses on designing mechanical components and assemblies using ... If eligible, the benefits available for this temporary role may include the following: * Medical ...
New
Quick apply
Design Engineer (Solidworks)
Gurnee, IL · On-site
$34 - $38.50/hr
Design Engineer This role focuses on designing mechanical components and assemblies using ... If eligible, the benefits available for this temporary role may include the following: * Medical ...
New
Mechanical Design Engineer
Ottawa, IL · On-site
$31.25 - $50/hr
Mechanical Design Engineer We are seeking a dedicated Mechanical Design Engineer to contribute to ... If eligible, the benefits available for this temporary role may include the following: * Medical ...
Quick apply
Mechanical Design Engineer
Ottawa, IL · On-site
$31.25 - $50/hr
Mechanical Design Engineer We are seeking a dedicated Mechanical Design Engineer to contribute to ... If eligible, the benefits available for this temporary role may include the following: * Medical ...
Temporary Asic Rtl Design Engineer information
What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?
| Aspect | Temporary Asic Rtl Design Engineer | Temporary FPGA Design Engineer |
|---|---|---|
| Primary Focus | Designing RTL code for ASIC chips | Designing FPGA logic and configurations |
| Skills & Certifications | Verilog/VHDL, ASIC design flow, simulation tools | Verilog/VHDL, FPGA development tools, synthesis |
| Work Environment | Semiconductor companies, ASIC design teams | FPGA development labs, prototyping environments |
| Industry Usage | Used in high-volume chip manufacturing | Used for prototyping, testing, and low-volume products |
Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.
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The most popular types of Asic Rtl Design Engineer jobs in Illinois are:
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Job description
IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next generation of custom ASICs that power our trading infrastructure.
As a member of the Global Hardware organization, you'll work on long-term, high-impact engineering challenges that directly influence the performance and scalability of IMC's trading systems. This team focuses on designing proprietary hardware solutions that deliver meaningful advantages in latency-sensitive environments, partnering closely with software engineers, researchers, and trading teams to solve complex technical problems.
This role combines hardware design, verification, and system-level thinking. You'll contribute across the ASIC development lifecycle, from RTL design and validation to integration within larger hardware platforms. Because of the team's size and collaborative culture, engineers have broad ownership and exposure to multiple aspects of the design process rather than being confined to a narrow specialization.
What You'll Do
ASIC Design & Development
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture and commitment to continuous innovation.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Salary Range
$200,000-$225,000 USD
About Us
IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.
As a member of the Global Hardware organization, you'll work on long-term, high-impact engineering challenges that directly influence the performance and scalability of IMC's trading systems. This team focuses on designing proprietary hardware solutions that deliver meaningful advantages in latency-sensitive environments, partnering closely with software engineers, researchers, and trading teams to solve complex technical problems.
This role combines hardware design, verification, and system-level thinking. You'll contribute across the ASIC development lifecycle, from RTL design and validation to integration within larger hardware platforms. Because of the team's size and collaborative culture, engineers have broad ownership and exposure to multiple aspects of the design process rather than being confined to a narrow specialization.
What You'll Do
ASIC Design & Development
- Participate in the full ASIC development lifecycle, from specification through integration and deployment
- Design and implement RTL for next-generation ASIC platforms using SystemVerilog
- Contribute to architecture and design discussions for performance-critical hardware systems
- Develop new functionality that supports evolving trading and infrastructure requirements
- Collaborate with hardware, software, and research teams to translate requirements into scalable solutions
- Develop unit tests and verification environments for RTL designs
- Validate functionality and performance of hardware components
- Debug design and integration issues throughout the development process
- Contribute to verification methodologies and testing infrastructure
- Ensure designs meet reliability, performance, and maintainability requirements
- Develop scripts and tooling to improve engineering workflows
- Support automation efforts across design and verification processes
- Contribute to continuous improvements in development methodologies and engineering practices
- BS+ in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline
- Strong experience with RTL design and development using SystemVerilog
- Strong understanding of digital design fundamentals
- Working knowledge of C++
- Experience developing and executing verification and test strategies
- Experience working with multi-clock-domain designs and clock-domain crossing concepts
- Solid understanding of Ethernet protocols and networking fundamentals
- Experience with Python, Bash, or similar scripting languages
- Strong debugging and problem-solving skills
- Ability to collaborate effectively across multiple engineering disciplines
- ASIC development experience
- FPGA development experience with relevant ASIC design exposure
- Familiarity with PMA (Physical Media Attachment) technologies
- Experience with high-performance networking systems
- Experience designing low-latency or performance-sensitive systems
- Exposure to trading, market infrastructure, or financial technology environments
- Experience building verification frameworks or test automation tools
- Strong C++ development skills
- Balances architecture-level thinking with hands-on implementation
- Enjoys solving difficult technical problems across hardware and software domains
- Takes ownership of systems and follows through from design to deployment
- Demonstrates strong attention to detail and engineering rigor
- Thrives in collaborative environments and works well across teams
- Learns quickly and adapts to evolving technical challenges
- Communicates clearly and effectively with both technical and non-technical stakeholders
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture and commitment to continuous innovation.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Salary Range
$200,000-$225,000 USD
About Us
IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.