Principal ASIC Design Engineer
$180K - $220K/yr
Join a world-class team of scientists, engineers, and business professionals to advance the ... Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
$180K - $220K/yr
Join a world-class team of scientists, engineers, and business professionals to advance the ... Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
$180K - $220K/yr
Join a world-class team of scientists, engineers, and business professionals to advance the ... Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
Boulder, CO · On-site
$180K - $220K/yr
Join a world-class team of scientists, engineers, and business professionals to advance the ... Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
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Boulder, CO · On-site
$180K - $220K/yr
Join a world-class team of scientists, engineers, and business professionals to advance the ... Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
Fort Collins, CO · On-site
$106K/yr
We are looking for an experienced VLSI RTL design engineer to join this innovative team. In this role, the candidate will invent and implement the highest performance, most energy efficient cache and ...
Fort Collins, CO · On-site
$106K/yr
We are looking for an experienced VLSI RTL design engineer to join this innovative team. In this role, the candidate will invent and implement the highest performance, most energy efficient cache and ...
Fort Collins, CO · Hybrid
We are looking for an experienced VLSI RTL design engineer to join this innovative team. In this role, the candidate will invent and implement the highest performance, most energy efficient cache and ...
Fort Collins, CO · Hybrid
We are looking for an experienced VLSI RTL design engineer to join this innovative team. In this role, the candidate will invent and implement the highest performance, most energy efficient cache and ...
Colorado Springs, CO · On-site
$112K - $166K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Partial telecommute benefit (2 days/week work from home). Requirements: Must have a Master's degree ...
Colorado Springs, CO · On-site
$112K - $166K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Partial telecommute benefit (2 days/week work from home). Requirements: Must have a Master's degree ...
Colorado Springs, CO · On-site
$112K - $166K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Partial telecommute benefit (2 days/week work from home). Requirements: Must have a Master's degree ...
Colorado Springs, CO · On-site
$112K - $166K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Partial telecommute benefit (2 days/week work from home). Requirements: Must have a Master's degree ...
$60K - $96K/yr
Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.
$60K - $96K/yr
Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.
Fort Collins, CO · On-site
$60K - $96K/yr
Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.
Fort Collins, CO · On-site
$60K - $96K/yr
Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.
Colorado Springs, CO · On-site
$134K/yr
We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC ... RTL designers, and verification engineers; establish clear technical expectations and a culture of ...
Colorado Springs, CO · On-site
$134K/yr
We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC ... RTL designers, and verification engineers; establish clear technical expectations and a culture of ...
Colorado Springs, CO · On-site
$134K/yr
We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC ... RTL designers, and verification engineers; establish clear technical expectations and a culture of ...
Colorado Springs, CO · On-site
$134K/yr
We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC ... RTL designers, and verification engineers; establish clear technical expectations and a culture of ...
Colorado Springs, CO · On-site
$134K - $138K/yr
Our team of senior engineers has delivered generations of innovation across ASIC and product ... Coordinate closely with RTL/design, DFT/test, packaging, and systems teams to ensure clean handoffs ...
Colorado Springs, CO · On-site
$134K - $138K/yr
Our team of senior engineers has delivered generations of innovation across ASIC and product ... Coordinate closely with RTL/design, DFT/test, packaging, and systems teams to ensure clean handoffs ...
Longmont, CO · On-site
$143 - $222.01/hr
Define requirements for ASIC design, verification, and physical implementation teams. Evaluate area ... Verilog, System Verilog, or VHDL; 3. RTL design and verification; and 4. Physical design aspects ...
Longmont, CO · On-site
$143 - $222.01/hr
Define requirements for ASIC design, verification, and physical implementation teams. Evaluate area ... Verilog, System Verilog, or VHDL; 3. RTL design and verification; and 4. Physical design aspects ...
Colorado Springs, CO · On-site
$134K - $138K/yr
Our team of senior engineers has delivered generations of innovation across ASIC and product ... Coordinate closely with RTL/design, DFT/test, packaging, and systems teams to ensure clean handoffs ...
Colorado Springs, CO · On-site
$134K - $138K/yr
Our team of senior engineers has delivered generations of innovation across ASIC and product ... Coordinate closely with RTL/design, DFT/test, packaging, and systems teams to ensure clean handoffs ...
Longmont, CO · On-site
$143 - $222.01/hr
Define requirements for ASIC design, verification, and physical implementation teams. Evaluate area ... Verilog, System Verilog, or VHDL; 3. RTL design and verification; and 4. Physical design aspects ...
Longmont, CO · On-site
$143 - $222.01/hr
Define requirements for ASIC design, verification, and physical implementation teams. Evaluate area ... Verilog, System Verilog, or VHDL; 3. RTL design and verification; and 4. Physical design aspects ...
Boulder, CO · On-site
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
Boulder, CO · On-site
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
Boulder, CO · On-site
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
Boulder, CO · On-site
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
Boulder, CO · On-site
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
Boulder, CO · On-site
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
$129K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
$123K - $169K/yr
Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space ...
$123K - $169K/yr
Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space ...
$123K - $169K/yr
Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space ...
$123K - $169K/yr
Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space ...
| Aspect | Telecommute Asic Rtl Design Engineer | Telecommute Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL coding | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design |
| Work Environment | Remote, primarily designing RTL code for ASICs | Remote, focusing on digital IC architecture and design |
| Industry Usage | Common in semiconductor and electronics companies |
Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.
$180K - $220K/yr
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Re-posted 5 days ago
At Atom Computing, we build quantum computers using arrays of optically trapped neutral atoms that will empower customers to achieve unprecedented computational breakthroughs. Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing.Â
Atom Computing is seeking a Principal ASIC Designer to oversee the development of critical technologies that power our quantum computers. In this role, you will own end-to-end design strategy-from requirements definition through silicon bring-up-while driving critical trade-off decisions across performance, power, area, and system integration constraints. You will partner closely with customers and cross-functional teams to translate evolving requirements into production-ready designs, ensuring alignment between technical execution and business objectives. As a senior technical leader, you will provide strategic guidance to executive stakeholders, shaping the long-term silicon roadmap and influencing key investment decisions. This position requires deep expertise in ASIC development and strong systems thinking.Â
Due to the need for collaboration with Atom's theory, software, hardware and optics teams, this role is required to be in the office in Boulder, CO or Austin, TX at least 3 days per week.Â
Atom Computing provides a wide variety of perks and benefits, including fully paid medical, dental, and vision insurance for our employees and their dependents. Additionally, unlimited paid time off, 401K company matching, short- and long-term disability, FSA, dependent care benefits, and life insurance. We also offer drinks, snacks, and catered team lunches in our offices, every day!
The base salary range for this position is between $180,000 - $220,000, commensurate with experience. In addition to salary, we offer an annual bonus and equity in the company.
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It services
11 - 50 Employees
Berkeley, CA, US
2018