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Telecommute Asic Rtl Design Engineer Jobs in Colorado

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO

$130K - $185K/yr

Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of ... FPGA design experience including thorough design documentation, completion and review of RTL blocks ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO

Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of ... FPGA design experience including thorough design documentation, completion and review of RTL blocks ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of ... FPGA design experience including thorough design documentation, completion and review of RTL blocks ...

Protingent

Verification Engineer

Englewood, CO · On-site

$130K - $200K/yr

Work on both ASIC and FPGA Space system projects Job Qualifications: * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Job Details: * Job ...

Lockheed Martin

ASIC/FPGA Design Engineer IV

Littleton, CO · On-site

$124K - $171K/yr

Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space ...

Ursa Major

Staff FPGA Design Engineer

Berthoud, CO · On-site

$123K - $169K/yr

As a Staff Electrical Engineer, you will work with cross-functional design and development teams to ... Architect and generate ASIC/FPGA RTL code * Generate test cases and run simulations to verify ...

New

Ursa Major

Staff FPGA Design Engineer

Berthoud, CO · On-site

$123K - $169K/yr

As a Staff Electrical Engineer, you will work with cross-functional design and development teams to ... Architect and generate ASIC/FPGA RTL code * Generate test cases and run simulations to verify ...

New

Ursa Major

Staff FPGA Design Engineer

Berthoud, CO

$123K - $169K/yr

As a Staff Electrical Engineer, you will work with cross-functional design and development teams to ... Architect and generate ASIC/FPGA RTL code * Generate test cases and run simulations to verify ...

New

Arrow Electronics

Design Verification Engineer

Denver, CO · On-site

$167K - $184K/yr

Debugging of complex verification environment, test bench and RTL issues. Thorough analysis of ... System-level verification, digital design, and ASIC design; Hardware description languages; UVM ...

Broadcom

IC Design Engineer

Fort Collins, CO · On-site

Broadcom's ASIC Products Division is seeking a Design Automation Software Development Engineer in the Design For Test (DFT) team developing SoC ASIC products. They will define, develop, deploy and ...

Broadcom, Inc.

IC Design Engineer

Fort Collins, CO · On-site

Broadcom's ASIC Products Division is seeking a Design Automation Software Development Engineer in the Design For Test (DFT) team developing SoC ASIC products. They will define, develop, deploy and ...

Broadcom

Design Verification Engineer

Fort Collins, CO · On-site

$108K - $172K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Broadcom, Inc.

Design Verification Engineer

Broomfield, CO · On-site

$108K - $172K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Broadcom

Design Verification Engineer

Broomfield, CO · On-site

$108K - $172K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Intel

DFT Design Engineer

Fort Collins, CO

$105K - $149K/yr

As a DFT Design Engineer, you will play a vital role in shaping the quality and performance of ... Write and generate RTL and structural code for DFT integration, ensuring design integrity for ...

New

Intel Corporation

DFT Design Engineer

Fort Collins, CO · On-site

$105K - $149K/yr

As a DFT Design Engineer, you will play a vital role in shaping the quality and performance of ... Write and generate RTL and structural code for DFT integration, ensuring design integrity for ...

New

Chipton Ross

FPGA Design Engineer

Littleton, CO · On-site

$100/hr

Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...

RAMON.SPACE

Verification Engineer

Englewood, CO · Hybrid

$130K - $200K/yr

Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...

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All JobsTelecommute Asic Rtl Design Engineer JobsTelecommute Asic Rtl Design Engineer Jobs in Colorado

Telecommute Asic Rtl Design Engineer information

What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a Telecommute ASIC RTL Design Engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Colorado? The most popular types of Asic Rtl Design Engineer jobs in Colorado are:
Telecommute Asic Rtl Design Engineer jobs near you
Senior FPGA Engineer

Senior FPGA Engineer

SEAKR Engineering

Englewood, CO

$130K - $185K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 8 days ago

Job description

Company Description

Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space.

Job Description

Seeking an FPGA Engineer who has extensive knowledge of digital circuit design, state machines, Boolean math and FPGAs.

Candidate shall have experience with

  • Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of moderate complexity
  • Demonstrate knowledge and development of a test bench with self-checking and simulation (including back annotated timing) for given FPGA modules, top level FPGA, and system with multiple FPGAs
  • FPGA technology differences (Xilinx vs Actel/Microsemi)
  • FPGA process and development flows, especially flows using Synplify Pro, ISE, Vivado and Libero
  • Scripting languages such as TCL or Python
  • Leading small sized teams in order to develop moderately complex systems according to program schedule expectations

Required skills

  • FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design 
  • Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers 

Knowledge of RTL design techniques for radiation upset mitigation and experience using multiple RTL languages are a plus.

Qualifications
  • Candidate shall also have leadership skills and ability to provide support and technical direction to junior engineers.  
  • Clear written and verbal communication skills are required.
  • A Bachelor's degree in Electrical Engineering or Computer Science is desired. 
  • Must have at least 10+ years of FPGA experience.
Additional Information

Compensation: Base pay range is $130,000-185,000 depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year-end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA.

SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines. 

US Citizenship Required

Applications will be accepted until 6/19/26

Apply