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Telecommute Asic Rtl Design Engineer Jobs in Colorado

Broadcom, Inc.

RTL Design Sign Off Lead

Fort Collins, CO · On-site

$108K - $172.80K/yr

We are seeking a Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, Clock ... RTL freeze. The ideal candidate has 8+ years of experience and a mastery of structural and ...

Broadcom

RTL Design Sign Off Lead

Fort Collins, CO

$108K - $172.80K/yr

We are seeking a Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, Clock ... RTL freeze. The ideal candidate has 8+ years of experience and a mastery of structural and ...

Chipton Ross

FPGA Design Engineer

Littleton, CO · On-site

$123.20K - $169.80K/yr

Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...

Lockheed Martin Corporation

$123.20K - $169.80K/yr

As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA design and verification engineers in executing design services for programs in the integration and test ...

New

Lockheed Martin

FPGA Design Eng

Boulder, CO · On-site

$82.90K - $146.17K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin

FPGA Design Eng Sr

Boulder, CO · On-site

$101K - $178.14K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Broadcom

Digital Design RTL Engineer

Fort Collins, CO · On-site

$91K - $146K/yr

... Design teams to mitigate risks and ensure project milestones are met on schedule * High proficiency in SystemVerilog * Proven track record of delivering high-quality SystemVerilog RTL in advanced ...

Broadcom

Package Design Engineer

Fort Collins, CO · On-site

$141.30K - $226K/yr

Overall design responsibility for ASIC package designs, including aspects of signal integrity ... General flip-chip BGA package design & engineering * Project management and customer interface for ...

Broadcom, Inc.

Digital Design RTL Engineer

Fort Collins, CO · On-site

$91K - $146K/yr

... Design teams to mitigate risks and ensure project milestones are met on schedule * High proficiency in SystemVerilog * Proven track record of delivering high-quality SystemVerilog RTL in advanced ...

Broadcom

IP Integration Engineer

Fort Collins, CO · On-site

$91K - $146K/yr

IP Integration Engineer Broadcom's ASIC Product Division (APD) is focused on enabling customers to ... Have an understanding of the ASIC design flow including FET design, RTL, synthesis, timing ...

RK Mechanical

Lead Design Engineer

Aurora, CO

$146K - $185K/yr

Position Summary The Lead Design Engineer serves as the technical leader of the Design Engineering ... not a telecommuting position), currently located in the Aurora, including a reliable means of ...

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Telecommute Asic Rtl Design Engineer information

What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What is a Telecommute ASIC RTL Design Engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Colorado? The most popular types of Asic Rtl Design Engineer jobs in Colorado are:
What are popular job titles related to Telecommute Asic Rtl Design Engineer jobs in Colorado? For Telecommute Asic Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:
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Telecommute Asic Rtl Design Engineer jobs near you
RTL Design Sign Off Lead

RTL Design Sign Off Lead

Broadcom, Inc.

Fort Collins, CO • On-site

$108K - $172.80K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 16 days ago

Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

12th of 137 rated electronics manufacturers

Job description

Please Note:
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2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
We are seeking a Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) sign-off for high speed complex IPs to be delivered to the SOC teams.
In this role, you will be the technical authority responsible for defining and enforcing synchronization strategies across complex, multi-clock domains in advanced process nodes. You will own the constraint creation process for synthesis, full-chip CDC/RDC methodology, establishing rigorous constraints and waivers to ensure zero-defect silicon. You will collaborate closely with Architecture and Chip Lead teams to review the testability and DFT design, clocking and reset architectures early in the design cycle, identifying potential metastability or reset-glitch issues before RTL freeze.
The ideal candidate has 8+ years of experience and a mastery of structural and functional verification of crossings using industry-standard tools (e.g., SpyGlass CDC/RDC, Spyglass Lint, JasperGold, or Meridian). Experience with high-speed interfaces such as SerDes, LPDDR5/6, DDR4/5 or HBM, where asynchronous boundaries are critical, is highly desired. As a Senior Engineer, you are expected to mentor the broader design team on Synthesis, DFT, CDC/RDC best practices and drive automated flows to streamline sign-off for multi-site global teams.
Requirements:
  • BSEE required, MSEE/PHD preferred
  • 8+ years of related experience

Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $108,000 - $172,800.
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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