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Telecommute Asic Rtl Design Engineer Jobs in Colorado

Verification Engineer

Englewood, CO · Hybrid

$130K - $200K/yr

Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...

Verification Engineer

Englewood, CO · Hybrid

$130K - $200K/yr

Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...

Verification Engineer

Englewood, CO · Hybrid

$130K - $200K/yr

Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...

$123K - $169K/yr

As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA design and verification engineers in executing design services for programs in the integration and test ...

FPGA Design Eng

Boulder, CO · On-site

$82K - $146K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

FPGA Design Eng Sr

Boulder, CO · On-site

$101K - $178K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Overall design responsibility for ASIC package designs, including aspects of signal integrity ... General flip-chip BGA package design & engineering * Project management and customer interface for ...

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Telecommute Asic Rtl Design Engineer information

What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a Telecommute ASIC RTL Design Engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Colorado? The most popular types of Asic Rtl Design Engineer jobs in Colorado are:
Senior Custom ASIC Engineering Lead

Senior Custom ASIC Engineering Lead

Broadcom

Fort Collins, CO

$143K - $230K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 9 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

11th of 142 rated electronics manufacturers


Job description

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Job Description:

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, and packaging? Have you taped out so many chips that you can identify potential design problems hidden in EDA reports, advise design teams on how to fix them, and then publish an application note about avoiding them in future? Do you love technical-deep-dive with engineers and providing an eagle's eye summary to management? If this is your engineering profile and you are looking for a challenge, then we have one for you.

Broadcom develops critical Infrastructure chips that enable a variety of Customers to produce ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible position, and an opportunity to push the frontiers of technology by working with cross-functional teams inside and outside of Broadcom.

As a valued member of this team, you will be required to do the following:

  • Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production

  • Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts

  • See ahead, plan ahead, work ahead. Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions

  • Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom's stringent tape-out quality standards

  • Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications

  • Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams

  • Be a consummate team player and assist other teams in need

You must have these proven skills to qualify for this position:

  • Multiple tape-outs in advanced technology nodes

  • Analyze PPA tradeoffs involved amongst various library components, and architectures

  • Knowledgeable in low power design and power management

  • Hands-on experience in physical design and STA, EDA tools, design flows for physical design, logic simulation, test, and packaging

  • Programming in TCL, shell and scripting languages

Following skills are nice to have:

  • Exposure to SERDES communications protocols.

  • Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification, DRC, logic synthesis

  • Knowledge of DFT methods including scan, memory BIST and repair

Education and Experience Requirements:

  • Bachelors degree and 12+ years of related experience; or Masters degree and 10+ years of related experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is$143,800 - $230,000.

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.


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