If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ...
ASIC & FPGA Design Engineer Sr
$114K - $158K/yr
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ...
ASIC & FPGA Design Engineer Sr
$114K - $158K/yr
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... RTL in VHDL/Verilog/SystemVerilog that satisfies performance, power, and reliability targets. • ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... RTL in VHDL/Verilog/SystemVerilog that satisfies performance, power, and reliability targets. • ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Fpga Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design ... The engineer will collaborate across hardware and software teams, mentor junior engineers, and ...
Quick apply
Fpga Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design ... The engineer will collaborate across hardware and software teams, mentor junior engineers, and ...
FPGA Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design ... The engineer will be supporting the development of a cryptography platform and collaborate across ...
Quick apply
FPGA Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design ... The engineer will be supporting the development of a cryptography platform and collaborate across ...
Sr. RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Sr. RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Quick apply
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
ASIC & FPGA Design Engineer
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
ASIC & FPGA Design Engineer
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Quick apply
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Staff RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Staff RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Telecommute Asic Rtl Design Engineer information
What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?
What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?
What is a Telecommute ASIC RTL Design Engineer?
What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?
| Aspect | Telecommute Asic Rtl Design Engineer | Telecommute Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL coding | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design |
| Work Environment | Remote, primarily designing RTL code for ASICs | Remote, focusing on digital IC architecture and design |
| Industry Usage | Common in semiconductor and electronics companies |
Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.
Apple rating
8.0
Based on 676 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976