ASIC Verification Engineer
Durham, NC · Hybrid
Our culture thrives onfinding new and better ways to accelerate what's next.We know varied ... design functionality. Collaborate with cross-functional teams to identify and resolve issues ...
Durham, NC · Hybrid
Our culture thrives onfinding new and better ways to accelerate what's next.We know varied ... design functionality. Collaborate with cross-functional teams to identify and resolve issues ...
Durham, NC · Hybrid
Our culture thrives onfinding new and better ways to accelerate what's next.We know varied ... design functionality. Collaborate with cross-functional teams to identify and resolve issues ...
Durham, NC · Hybrid
Our culture thrives onfinding new and better ways to accelerate what's next.We know varied ... design functionality. Collaborate with cross-functional teams to identify and resolve issues ...
Durham, NC · Hybrid
Our culture thrives onfinding new and better ways to accelerate what's next.We know varied ... design functionality. Collaborate with cross-functional teams to identify and resolve issues ...
Role Overview As a zeroRISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate ...
Role Overview As a zeroRISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate ...
Seattle, WA · On-site
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
Seattle, WA · On-site
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
Quick apply
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
Quick apply
$190K - $285K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ...
Minneapolis, MN · On-site
$142K - $173K/yr
Typical tasks include: development of new simulation environments, execution of verification plans ... ASIC/FPGA design verification experience with UVM methodologies. * Develop and maintain UVMbased ...
Minneapolis, MN · On-site
$142K - $173K/yr
Typical tasks include: development of new simulation environments, execution of verification plans ... ASIC/FPGA design verification experience with UVM methodologies. * Develop and maintain UVMbased ...
$139K - $169K/yr
Drive Design Verification to closure using defined verification metrics for test plans, functional ... Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or ...
$139K - $169K/yr
Drive Design Verification to closure using defined verification metrics for test plans, functional ... Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or ...
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Redmond, WA · On-site
$165K - $260K/yr
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Redmond, WA · On-site
$165K - $260K/yr
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Santa Clara, CA · On-site
$126K - $190K/yr
... new possibilities that will transform industries, create jobs, and enrich lives. But this is just ... This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer ...
Santa Clara, CA · On-site
$126K - $190K/yr
... new possibilities that will transform industries, create jobs, and enrich lives. But this is just ... This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Seattle, WA · On-site
$170K - $250K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ...
Quick apply
Seattle, WA · On-site
$170K - $250K/yr
... this new era demands a fundamentally different class of spacecraft. Engineered to survive the ... The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ...
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...
San Jose, CA · On-site
$159K - $194K/yr
Hand on ASIC-SoC Design verification tests and debug experience. * Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology * Good problem-solving skills, and the ...
San Jose, CA · On-site
$159K - $194K/yr
Hand on ASIC-SoC Design verification tests and debug experience. * Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology * Good problem-solving skills, and the ...
$105.5K - $111.1K
0% of jobs
$111.1K - $116.7K
0% of jobs
$116.7K - $122.3K
0% of jobs
$122.3K - $127.9K
0% of jobs
$127.9K - $133.5K
0% of jobs
$135.6K is the 25th percentile. Wages below this are outliers.
$133.5K - $139K
65% of jobs
$139K - $144.6K
0% of jobs
$144.6K - $150.2K
0% of jobs
$150.2K - $155.8K
0% of jobs
$155.8K - $161.4K
0% of jobs
$163K is the 75th percentile. Wages above this are outliers.
$161.4K - $167K
35% of jobs
$105.5K
$149.2K
$167K
| Aspect | New Grad Asic Design Verification Engineer | New Grad Digital Design Engineer |
|---|---|---|
| Required Skills | Hardware verification, simulation, scripting, HDL knowledge | Digital circuit design, HDL coding, logic design |
| Work Environment | Verification labs, simulation tools, hardware testing | Design teams, FPGA/ASIC development, coding |
| Industry Usage | Primarily in semiconductor and chip companies | Broadly in electronics, semiconductor, and tech firms |
While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

Full-time
Re-posted 21 days ago
8.4
Based on 26 frontline employees who took The Breakroom Quiz
36th of 156 rated electronics manufacturers
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.Our culture thrives onfinding new and better ways to accelerate what's next.We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs.We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.Open up opportunities with HPE.
Job Description:
This is a Hybrid role based in Durham, NC with an expectation that you'll be in the office 2 days per week.
HPE Networking is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. At HPE Networking Silicon group, we push the boundaries of what is possible in a piece of silicon die. We build cutting edge networking chips used to build our world-class routers and switches.
Bring your passion and there are no boundaries to what you can accomplish here. We are like a start-up in a big company. Year after year, our group builds the most powerful and highest density networking chips.
As part of our fast-paced silicon group, you will become an expert in building high-speed ASICs, from specifications to final netlist. We give you opportunities to work on complex modules and subsystems where you can challenge yourself and grow.
Open communications, empowerment, innovation, teamwork, and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements, and rewards.
Position Summary
We are seeking a highly motivated ASIC Verification Engineer to join our networking silicon development team.
Key Responsibilities:
Own and drive block-level or subsystem verification efforts, from creating test plans to achieving comprehensive coverage closure.
Develop, enhance, and maintain advanced UVM verification environments, including agents, sequences, scoreboards, virtual sequences, and register models.
Perform constraint-driven random testing, debug complex SoC designs, and ensure functional coverage and assertion goals are met.
Analyze simulation results using industry-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design functionality.
Collaborate with cross-functional teams to identify and resolve issues, ensuring high-quality ASIC/SoC deliverables.
Required Skills and Qualifications:
3+ years of experience in ASIC/SoC verification with a proven track record of owning verification from test plan to coverage closure.
Strong expertise in SystemVerilog and UVM methodology, including developing environments from scratch.
Deep understanding of randomization, constraints, functional coverage, and assertions (SVA).
Hands-on experience in test planning, coverage analysis, and debugging of complex SoC designs.
Proficiency with industry-standard simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.
Preferred Skills and Experience:
Experience verifying networking ASICs or router datapath/control blocks, such as packet processing, forwarding engines, or fabric interfaces.
Familiarity with high-speed interconnects, buffers, or scheduling pipelines in large networking SoCs.
Exposure to emulation environments, hardware acceleration, or traffic-model integration.
Knowledge of coverage analytics, regression dashboards, and continuous-integration flows (e.g., Jenkins).
Understanding of low-power (UPF) or formal verification methodologies.
Own and drive block-level/subsystem/FullChip verification efforts, from creating test plans to achieving comprehensive coverage closure
Experience with post-silicon bring-up and debug is a plus.
Familiarity with emulation environments and debug flows is desirable.
What We Can Offer You:
Health & Wellbeing
We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
Personal & Professional Development
We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.
Unconditional Inclusion
We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.
Let's Stay Connected:
Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.
Job:
EngineeringJob Level:
TCP_03"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html
HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.
Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.
HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.
Recruitment Fraud Alert
We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications.
All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual's own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.
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10,000+ Employees
Spring, TX, US
2015