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New Grad Asic Design Verification Engineer Jobs in Florida

Apple

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

At Apple, new ideas have a way of becoming extraordinary products, services, and customer ... design/verification. Experience or coursework with object oriented programming languages.

Apple

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

At Apple, new ideas have a way of becoming extraordinary products, services, and customer ... design/verification. Experience or coursework with object oriented programming languages.

Apple

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

At Apple, new ideas have a way of becoming extraordinary products, services, and customer ... engineers in delivering well-verified IP. - Collaborate with architecture, design and modeling ...

Apple

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

At Apple, new ideas have a way of becoming extraordinary products, services, and customer ... engineers in delivering well-verified IP. - Collaborate with architecture, design and modeling ...

Apple

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

At Apple, new ideas have a way of becoming extraordinary products, services, and customer ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...

Apple

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

At Apple, new ideas have a way of becoming extraordinary products, services, and customer ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...

Sapsol Technologies Inc

FPGA Engineer

Melbourne, FL · On-site

$120K - $154K/yr

FPGA verification in lab testing and/or Hardware FPGA design verification testing * Experience with ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...

Sapsol Technologies Inc

FPGA Engineer

Melbourne, FL · On-site

$120K - $154K/yr

FPGA verification in lab testing and/or Hardware FPGA design verification testing * Experience with ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...

Lockheed Martin

ASIC & FPGA Design Engineer

Orlando, FL · On-site +1

$114K - $158K/yr

You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin ... Drive DRC, LVS and ERC verification to achieve full closure for each target process. Perform or ...

Raytheon

Senior FPGA Design Engineer

Miami, FL

$117K - $162K/yr

Together, we push the boundaries of known science and find new ways to connect and protect our ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Raytheon

Senior FPGA Design Engineer

Orlando, FL

$114K - $158K/yr

Together, we push the boundaries of known science and find new ways to connect and protect our ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Apple

Timing Design Engineer

Melbourne, FL

Every new product we build, service we create, or Apple Store experience we deliver is the result ... Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ...

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All JobsNew Grad Asic Design Verification Engineer JobsNew Grad Asic Design Verification Engineer Jobs in Florida

New Grad Asic Design Verification Engineer information

What does a new grad ASIC design verification engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a new grad ASIC design verification engineer?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

What are some common challenges new graduates face when starting as an ASIC design verification engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.
What are popular job titles related to New Grad Asic Design Verification Engineer jobs in Florida? For New Grad Asic Design Verification Engineer jobs in Florida, the most frequently searched job titles are:
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Infographic showing various New Grad Asic Design Verification Engineer job openings in Florida as of August 2026, with employment types broken down into 87% Full Time, and 13% Contract. Highlights an 100% In-person job distribution.

FPGA/ Hardware Engineer/ Electrical Engineer

Purple Hires Inc

Melbourne, FL • On-site

Full-time

Posted 9 days ago

Job description

Expert‑level verification engineer with strong SystemVerilog and UVM experience. As an alternative to SystemVerilog/UVM, we are open to candidates with a verification background in lab testing and/or design verification testing. Experience with design on Xilinx products would be a strong plus.

Required Skills:

  • Expert‑level verification engineer with strong SystemVerilog  and/ or UVM experience or
  • FPGA verification in lab testing and/or Hardware FPGA design verification testing
  • Experience with design on Xilinx products would be a strong plus
  • expected to communicate effectively with emerging engineers at the India GETC‑I site and provide both technical and process (DO-254) guidance to the verification team.

Core Responsibilities

  • RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
  • Verification: Create UVM constrained random environments and conduct static timing, linting, and clock-domain-crossing (CDC) analyses.
  • Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing. [1]

Key Qualifications

  • Experience: Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior designation).
  • Education: Degree in a STEM (Science, Technology, Engineering, Mathematics) field.