RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
FPGA Design Engineer
Melbourne, FL · On-site
$114K - $157K/yr
FPGA Design Engineer Location: Melbourne, FL (Onsite) Duration: 6+ months Start Date: Immediate We ... Perform RTL coding, simulation, synthesis, place & route, and timing analysis. * Develop FPGA ...
FPGA Design Engineer
Melbourne, FL · On-site
$114K - $157K/yr
FPGA Design Engineer Location: Melbourne, FL (Onsite) Duration: 6+ months Start Date: Immediate We ... Perform RTL coding, simulation, synthesis, place & route, and timing analysis. * Develop FPGA ...
FPGA Design Engineer
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design ... The engineer will be supporting the development of a cryptography platform and collaborate across ...
Quick apply
FPGA Design Engineer
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design ... The engineer will be supporting the development of a cryptography platform and collaborate across ...
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Quick apply
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Quick apply
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Sr. RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Sr. RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Staff RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Staff RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Sr. RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Sr. RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Sr. RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Quick apply
Sr. RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Staff RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Quick apply
Staff RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Staff RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Staff RTL Engineer
Orlando, FL · On-site
Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany ... Design, implement and test Register-Transfer Level (RTL) features and components guided by system ...
Expert‑level verification engineer with strong SystemVerilog and UVM experience. As an ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Expert‑level verification engineer with strong SystemVerilog and UVM experience. As an ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Hardware Engineer/ Electrical Engineer (FPGA) - Melbourne, FL - Onsite - Fulltime Opportunity
Melbourne, FL · On-site
Role: Hardware Engineer/ Electrical Engineer- FPGA Location: Melbourne, FL - Onsite Duration ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Hardware Engineer/ Electrical Engineer (FPGA) - Melbourne, FL - Onsite - Fulltime Opportunity
Melbourne, FL · On-site
Role: Hardware Engineer/ Electrical Engineer- FPGA Location: Melbourne, FL - Onsite Duration ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
Expert-level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
Expert-level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
Expertlevel verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
Expertlevel verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Cpu Rtl Design Engineer information
See Florida salary details
$30.3K - $38.3K
2% of jobs
$38.3K - $46.3K
11% of jobs
$50.6K is the 25th percentile. Wages below this are outliers.
$46.3K - $54.3K
23% of jobs
The median wage is $59.5K / yr.
$54.3K - $62.3K
22% of jobs
$62.3K - $70.3K
17% of jobs
$70.6K is the 75th percentile. Wages above this are outliers.
$70.3K - $78.4K
9% of jobs
$78.4K - $86.4K
6% of jobs
$86.4K - $94.4K
3% of jobs
$94.4K - $102.4K
3% of jobs
$102.4K - $110.4K
2% of jobs
$110.4K - $118.4K
1% of jobs
$30.3K
$65.9K
$118.4K
How much do cpu rtl design engineer jobs pay per year?
As of Aug 10, 2026, the average yearly pay for cpu rtl design engineer in Florida is $65,873.00, according to ZipRecruiter salary data. Most workers in this role earn between $50,800.00 and $73,600.00 per year, depending on experience, location, and employer.
What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?
| Aspect | Cpu Rtl Design Engineer | Cpu Verification Engineer |
|---|---|---|
| Primary Focus | Designing and developing RTL code for CPU components | Verifying and testing RTL designs for correctness |
| Skills & Certifications | HDL languages (Verilog/VHDL), FPGA/ASIC design experience | HDL, testbench development, simulation tools |
| Work Environment | Design teams, hardware development labs | Verification teams, simulation environments |
| Industry Usage | Semiconductor companies, CPU design firms | ASIC/FPGA verification, chip validation |
While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.
What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?
CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.
What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?
To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.
What is a CPU RTL design engineer?
CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Florida? For Cpu Rtl Design Engineer jobs in Florida, the most frequently searched job titles are:
- Design Engineer
- Internship Electric Motor Design Engineer
- Junior Asic Verification Engineer
- Vice President Asic Design Engineer
- Creo Design Engineer
- Asic Design Verification Engineer
- Remote Work From Home Analog Mixed Signal Design Engineer
- Freelance Fpga Verification Engineer
- Senior Motor Design Engineer
- Fpga Design Engineer
What job categories do people searching Cpu Rtl Design Engineer jobs in Florida look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Florida are:
What cities in Florida are hiring for Cpu Rtl Design Engineer jobs? Cities in Florida with the most Cpu Rtl Design Engineer job openings:
Apple rating
8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design career and challenge yourself in a technical and multi-disciplinary endeavor? If so, this is an exciting position in the world class Apple mixed-signal silicon design team!
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976