Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Timing Design Engineer
Melbourne, FL · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...
Expert‑level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Expert‑level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
FPGA Engineer (Intern)
Miami, FL · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
FPGA Engineer (Intern)
Miami, FL · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Hardware Engineer/ Electrical Engineer (DO-254) - Permanent / Contract (Both Options are available)
Melbourne, FL · On-site
$114K - $151K/yr
Expert‑level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Hardware Engineer/ Electrical Engineer (DO-254) - Permanent / Contract (Both Options are available)
Melbourne, FL · On-site
$114K - $151K/yr
Expert‑level verification engineer with strong SystemVerilog and/ or UVM experience or * FPGA ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Hardware Engineer/ Electrical Engineer ( DO-254 ) Location: Melbourne, FL (Onsite) Long Term ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Hardware Engineer/ Electrical Engineer ( DO-254 ) Location: Melbourne, FL (Onsite) Long Term ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
ASIC & FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
They are seeking a Software Design Engineer/Game Developer to develop new functionalities and ... CPU bottleneck resolution and memory management. • Support customer-directed research and ...
They are seeking a Software Design Engineer/Game Developer to develop new functionalities and ... CPU bottleneck resolution and memory management. • Support customer-directed research and ...
Hardware Engineer/ Electrical Engineer (DO-254)
Melbourne, FL · On-site
$114K - $151K/yr
Hardware Engineer/ Electrical Engineer (DO-254) Melbourne, FL - Onsite - High Priority Visa: Any ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Hardware Engineer/ Electrical Engineer (DO-254)
Melbourne, FL · On-site
$114K - $151K/yr
Hardware Engineer/ Electrical Engineer (DO-254) Melbourne, FL - Onsite - High Priority Visa: Any ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Hardware Engineer/ Electrical Engineer (DO-254) Melbourne, FL - Onsite all 5 days Experience level ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Quick apply
Hardware Engineer/ Electrical Engineer (DO-254) Melbourne, FL - Onsite all 5 days Experience level ... RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
FPGA Engineer II (ONSITE)
$114K - $157K/yr
Collins Aerospace is seeking a FPGA Engineer II for the CNS (Communication, Navigation ... Develop RTL design code and simulation in VHDL, Verilog, and/or SystemVerilog. * Create testcases ...
New
FPGA Engineer II (ONSITE)
$114K - $157K/yr
Collins Aerospace is seeking a FPGA Engineer II for the CNS (Communication, Navigation ... Develop RTL design code and simulation in VHDL, Verilog, and/or SystemVerilog. * Create testcases ...
New
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
GPU Design Verification Engineer
Orlando, FL · On-site
$127K - $155K/yr
You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also ... design/verification. Experience or coursework with object oriented programming languages.
GPU Design Verification Engineer
Orlando, FL · On-site
$127K - $155K/yr
You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also ... design/verification. Experience or coursework with object oriented programming languages.
GPU Design Verification Engineer
$127K - $155K/yr
You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also ... design/verification. Experience or coursework with object oriented programming languages.
GPU Design Verification Engineer
$127K - $155K/yr
You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also ... design/verification. Experience or coursework with object oriented programming languages.
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
Design and implement custom UE5 engine plugins, modules, and rendering extensions using C++ and OOD ... Profile, debug, and optimize render performance including GPU/CPU bottleneck resolution and memory ...
GPU Design Verification Engineer
Orlando, FL · On-site
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...
GPU Design Verification Engineer
Orlando, FL · On-site
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...
GPU Design Verification Engineer
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...
GPU Design Verification Engineer
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...
Cpu Rtl Design Engineer information
See Florida salary details
$30.3K - $38.3K
2% of jobs
$38.3K - $46.3K
11% of jobs
$50.6K is the 25th percentile. Wages below this are outliers.
$46.3K - $54.3K
23% of jobs
The median wage is $59.5K / yr.
$54.3K - $62.3K
22% of jobs
$62.3K - $70.3K
17% of jobs
$70.6K is the 75th percentile. Wages above this are outliers.
$70.3K - $78.4K
9% of jobs
$78.4K - $86.4K
6% of jobs
$86.4K - $94.4K
3% of jobs
$94.4K - $102.4K
3% of jobs
$102.4K - $110.4K
2% of jobs
$110.4K - $118.4K
1% of jobs
$30.3K
$65.9K
$118.4K
How much do cpu rtl design engineer jobs pay per year?
As of Aug 11, 2026, the average yearly pay for cpu rtl design engineer in Florida is $65,873.00, according to ZipRecruiter salary data. Most workers in this role earn between $50,800.00 and $73,600.00 per year, depending on experience, location, and employer.
What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?
| Aspect | Cpu Rtl Design Engineer | Cpu Verification Engineer |
|---|---|---|
| Primary Focus | Designing and developing RTL code for CPU components | Verifying and testing RTL designs for correctness |
| Skills & Certifications | HDL languages (Verilog/VHDL), FPGA/ASIC design experience | HDL, testbench development, simulation tools |
| Work Environment | Design teams, hardware development labs | Verification teams, simulation environments |
| Industry Usage | Semiconductor companies, CPU design firms | ASIC/FPGA verification, chip validation |
While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.
What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?
CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.
What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?
To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.
What is a CPU RTL design engineer?
CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Florida? For Cpu Rtl Design Engineer jobs in Florida, the most frequently searched job titles are:
- Design Engineer
- Internship Electric Motor Design Engineer
- Junior Asic Verification Engineer
- Vice President Asic Design Engineer
- Creo Design Engineer
- Asic Design Verification Engineer
- Remote Work From Home Analog Mixed Signal Design Engineer
- Freelance Fpga Verification Engineer
- Senior Motor Design Engineer
- Fpga Design Engineer
What job categories do people searching Cpu Rtl Design Engineer jobs in Florida look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Florida are:
What cities in Florida are hiring for Cpu Rtl Design Engineer jobs? Cities in Florida with the most Cpu Rtl Design Engineer job openings:
Apple rating
8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
Apple is where individual imaginations come together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other’s ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It’s the diversity of our people and their thinking that encourages the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you’ll do more than join something - you’ll add something.
Description
As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of IP and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints. You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You will also come up with ideas and plans to verify your own timing constraints. You will innovate timing constraints and flow to facilitate timing closure and any potential pessimism or fall outs in timing analysis.
Preferred Qualifications
Proven knowledge of the ASIC design timing closure flow and methodology.
2+ years of experience in writing ASIC timing constraints and timing closure.
Expertise in STA tools (Primetime) and flow, knowledge of timing corners/modes, process variations and signal integrity related issues.
Hands on experience in timing/SDC constraints generation and management.
Proficient in scripting languages (Tcl and Perl).
Familiarity with synthesis, DFT and backend related methodology and tools.
Strong communication skills are a pre-requisite - you will be collaborating with many diverse groups at Apple.
The ideal candidate will be a self-starter and highly motivated to be successful at Apple.
Minimum Qualifications
BS degree in technical discipline with minimum 10 years of relevant experience.
Description
As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of IP and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints. You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You will also come up with ideas and plans to verify your own timing constraints. You will innovate timing constraints and flow to facilitate timing closure and any potential pessimism or fall outs in timing analysis.
Preferred Qualifications
Proven knowledge of the ASIC design timing closure flow and methodology.
2+ years of experience in writing ASIC timing constraints and timing closure.
Expertise in STA tools (Primetime) and flow, knowledge of timing corners/modes, process variations and signal integrity related issues.
Hands on experience in timing/SDC constraints generation and management.
Proficient in scripting languages (Tcl and Perl).
Familiarity with synthesis, DFT and backend related methodology and tools.
Strong communication skills are a pre-requisite - you will be collaborating with many diverse groups at Apple.
The ideal candidate will be a self-starter and highly motivated to be successful at Apple.
Minimum Qualifications
BS degree in technical discipline with minimum 10 years of relevant experience.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976