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Google Asic Design Engineer Jobs in Florida (NOW HIRING)

Senior FPGA Design Engineer

Miami, FL

$117K - $162K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

ASIC & FPGA Design Engineer Sr.

Orlando, FL · On-site

$114K - $158K/yr

You will be the Senior ASIC & FPGA Design Engineer for the Programmable Logic Design team supporting the Next Generation Short Range Interceptor (NGSRI). Our team creates the digital heart beats ...

Senior FPGA Design Engineer

Orlando, FL

$114K - $158K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

ASIC & FPGA Design Engineer Stf

Orlando, FL · On-site +1

$114K - $158K/yr

You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...

ASIC & FPGA Design Engineer Stf

Orlando, FL · On-site

$114K - $158K/yr

You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...

ASIC & FPGA Design Engineer Sr

Orlando, FL · On-site

$114K - $158K/yr

You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team within Missiles & Fire Control (MFC). Our team delivers the digital heart beat that powers the Next ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...

ASIC & FPGA Design Engineer Sr

Orlando, FL · On-site

$114K - $158K/yr

You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team within Missiles&Fire Control (MFC). Our team delivers the digital heart beat that powers the Next ...

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Google Asic Design Engineer information

See Florida salary details

$70.2K

$112.2K

$151K

How much do google asic design engineer jobs pay per year?

As of Jul 27, 2026, the average yearly pay for google asic design engineer in Florida is $112,240.00, according to ZipRecruiter salary data. Most workers in this role earn between $98,300.00 and $134,500.00 per year, depending on experience, location, and employer.

What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?

AspectGoogle Asic Design EngineerGoogle FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC designBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom silicon chips for Google productsDeveloping and testing FPGA prototypes for hardware acceleration
Employer & Industry UsagePrimarily in semiconductor and hardware design teams at GoogleHardware prototyping and acceleration teams at Google

The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.

How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?

As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.

What does a Google ASIC Design Engineer do?

A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.

What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.
What cities in Florida are hiring for Google Asic Design Engineer jobs? Cities in Florida with the most Google Asic Design Engineer job openings:
Infographic showing various Google Asic Design Engineer job openings in Florida as of July 2026, with employment types broken down into 21% As Needed, 72% Full Time, 4% Part Time, 2% Contract, and 1% Summer. Highlights an 87% Physical, 7% Hybrid, and 6% Remote job distribution, with an average salary of $112,240 per year, or $54 per hour.
Aerospace & Engineering Roles

Aerospace & Engineering Roles

Sapsol Technologies Inc

Melbourne, FL • Hybrid

Other

Posted 5 days ago


Job description

We are actively recruiting top engineering talent for several critical roles across Aerostructures, Avionics, Electrical, and ASIC Design.

(Note: All positions listed below are open for C2C / Corp-to-Corp engagements!)

Requirements

1. Aerostructure Manufacturing Engineer

Location: Wichita, KS (Onsite) | Status: All Visas Welcome

Key Skills: Shop floor support, non-conformance, CATIA V5, GD&T, metallic/composite primary structures.

2. Software Engineer (Embedded / Avionics)

Location: Deer Valley, AZ (Onsite) | Status: US Citizen or Green Card

Key Skills: Embedded C/C++, DO-178C, RF Design.

3. Systems Software Engineer

Location: Deer Valley, AZ (Onsite) | Status: US Citizen or Green Card

Key Skills: System Testing, Hardware Validation, Avionics Certification, FAA Standards.

4. Repair Design Engineer (MRB)

Location: Wichita, KS (Onsite) | Status: US Citizen or Green Card

Key Skills: Repair design, MRB non-conformance, CATIA V5, GD&T, fuselage/pylon/nacelle structures.

5. Electrical Engineer

Location: Melbourne, FL (Onsite) | Status: US Citizen or Green Card

Key Skills: Analog, Digital, and RF Circuit Design.

6. ASIC DFT Engineer

Location: 100% Remote | Status: All Visas Welcome

Key Skills: ASIC, Design-for-Test (DFT), SCAN, ATPG.