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Google Asic Design Engineer Jobs in Florida (NOW HIRING)

FPGA Engineer

Melbourne, FL · On-site

$120K - $154K/yr

Experience with design on Xilinx products would be a strong plus * expected to communicate ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...

Google AI Architect/AI and Engineering Join our AI & Engineering team in transforming technology ... Engineering as a Service provides complete design, implementation, and technology operations ...

Google AI Architect/AI and Engineering Join our AI & Engineering team in transforming technology ... Engineering as a Service provides complete design, implementation, and technology operations ...

Google AI Architect/AI and Engineering Join our AI & Engineering team in transforming technology ... Engineering as a Service provides complete design, implementation, and technology operations ...

As a Google SecOps Manager supporting Google SecOps engagements, you will contribute to high ... engineering, SIEM, SOAR, and automation development. You will design, implement, and optimize ...

As a Google SecOps Manager supporting Google SecOps engagements, you will contribute to high ... engineering, SIEM, SOAR, and automation development. You will design, implement, and optimize ...

Showing results 41-60

Google Asic Design Engineer information

See Florida salary details

$70.2K

$112.2K

$151K

How much do google asic design engineer jobs pay per year?

As of Aug 13, 2026, the average yearly pay for google asic design engineer in Florida is $112,240.00, according to ZipRecruiter salary data. Most workers in this role earn between $98,300.00 and $134,500.00 per year, depending on experience, location, and employer.

What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?

AspectGoogle Asic Design EngineerGoogle FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC designBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom silicon chips for Google productsDeveloping and testing FPGA prototypes for hardware acceleration
Employer & Industry UsagePrimarily in semiconductor and hardware design teams at GoogleHardware prototyping and acceleration teams at Google

The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.

How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?

As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.

What does a Google ASIC Design Engineer do?

A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.

What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.

What cities in Florida are hiring for Google Asic Design Engineer jobs?

Cities in Florida with the most Google Asic Design Engineer job openings:

Infographic showing various Google Asic Design Engineer job openings in Florida as of August 2026, with employment types broken down into 5% As Needed, 76% Full Time, and 19% Contract. Highlights an 95% In-person, and 5% Remote job distribution, with an average salary of $112,240 per year, or $54 per hour.

Information Technology_USA - USA_Engineer

Real Soft, Inc.

Jacksonville, FL • On-site

Contractor

Re-posted 11 days ago


Job description

**Please strictly adhere to the following resume naming convention:
ALL CAPS, NO SPACES B/T UNDERSCORES
PTN_US_GBAMSREQID_CandidateBeelineID
i.e. PTN_US_9999999_SKIPJOHNSON0413
: /hr
MSP Owner: Tory Robinson
Location : Dallas, TX - Onsite
Duration: 6+ months
skill id: 10714389
Unit design Validation and RF Engineer
• 5 years of experience in Electrical Engineering or Physics, specializing in RF/Microwave technology.
• Experience in Unit Level Testing 5G NR /RF products
• Strong understanding of 5G radio interfaces and other key critical interfaces, protocols,
and architecture of 3GPP network.
• Skilled in analytical platforms like MATLAB and Python
Role Descriptions: Unit design Validation and RF Engineer
Essential Skills: Unit design Validation and RF Engineer - Electrical Engineering or Physics with RFMicrowave technology| RF Circuit design| Simulation tools (HP ADSCSTHFSS)| MATLAB| Python
Desirable Skills:
Keyword:
Skills: Enterprise Simulation Language~EIS : ASIC Ciruit Design - Analog and Mixed Signal IC Circuit design
Experience Required: 6-8, Project Code :