If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Melbourne, FL · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Quick apply
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Quick apply
Senior FPGA Design Engineer
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Fpga Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design development are essential. This role involves driving FPGA design from concept through production ...
Quick apply
Fpga Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design development are essential. This role involves driving FPGA design from concept through production ...
FPGA Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design development are essential. This role involves driving FPGA design from concept through production ...
Quick apply
FPGA Design Engineer
Melbourne, FL · On-site
$75 - $90/hr
Strong skills in RTL design (VHDL/Verilog/SystemVerilog), timing closure, and block design development are essential. This role involves driving FPGA design from concept through production ...
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
New
Quick apply
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
New
Hardware Engineer/ Electrical Engineer (FPGA) - Melbourne, FL - Onsite - Fulltime Opportunity
Melbourne, FL · On-site
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
Quick apply
Hardware Engineer/ Electrical Engineer (FPGA) - Melbourne, FL - Onsite - Fulltime Opportunity
Melbourne, FL · On-site
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Quick apply
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Sr. RTL Engineer
Orlando, FL · On-site
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Sr. RTL Engineer
Orlando, FL · On-site
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Quick apply
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Staff RTL Engineer
Orlando, FL · On-site
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Staff RTL Engineer
Orlando, FL · On-site
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements * Own the detailed design of assigned firmware components and subsystem ...
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
New
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
New
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
New
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog. * Verification: Create UVM constrained random environments and conduct static timing, linting, and clock ...
New
FPGA Engineer (Intern)
Miami, FL · On-site
$4.3K - $4.8K/wk
Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience in one or more of the following areas: Hardware Architecture, Simulation, Systems Integration ...
FPGA Engineer (Intern)
Miami, FL · On-site
$4.3K - $4.8K/wk
Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience in one or more of the following areas: Hardware Architecture, Simulation, Systems Integration ...
$4.3K - $4.8K/wk
Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience in one or more of the following areas: Hardware Architecture, Simulation, Systems Integration ...
$4.3K - $4.8K/wk
Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience in one or more of the following areas: Hardware Architecture, Simulation, Systems Integration ...
Rtl Design information
See Florida salary details
$60.2K - $67.1K
0% of jobs
$67.1K - $74K
0% of jobs
$74K - $80.9K
1% of jobs
$80.9K - $87.9K
0% of jobs
$87.9K - $94.8K
0% of jobs
$97.7K is the 25th percentile. Wages below this are outliers.
$94.8K - $101.7K
57% of jobs
$104.7K is the 75th percentile. Wages above this are outliers.
$101.7K - $108.7K
38% of jobs
$108.7K - $115.6K
0% of jobs
$115.6K - $122.5K
1% of jobs
$122.5K - $129.5K
1% of jobs
$129.5K - $136.4K
1% of jobs
$60.2K
$104.1K
$136.4K
How much do rtl design jobs pay per year?
As of Jul 31, 2026, the average yearly pay for rtl design in Florida is $104,148.00, according to ZipRecruiter salary data. Most workers in this role earn between $101,600.00 and $101,600.00 per year, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive in the Rtl Design position, and why are they important?
To thrive as an RTL Design engineer, you need a solid background in digital logic design, computer architecture, and proficiency in hardware description languages such as Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools like Synopsys, Cadence, or Mentor Graphics, and experience with FPGA/ASIC flows, are highly valuable, as are relevant industry certifications. Strong problem-solving skills, attention to detail, and effective communication foster successful collaboration with verification and physical design teams. These skills are crucial for delivering robust, efficient hardware solutions in complex chip development projects.
What does a typical day look like for an RTL Design engineer and how do they interact with other teams?
A typical day for an RTL Design engineer involves writing and optimizing RTL code, running simulations, debugging designs, and reviewing results from verification teams. Collaboration is key, as you will frequently interact with verification engineers, physical design teams, and architects to ensure the design meets both functional and performance requirements. You may also participate in design reviews, resolve issues found during testing, and work with project managers to meet deadlines. This cross-functional teamwork creates a dynamic environment where communication and problem-solving skills are highly valued, helping ensure the successful delivery of silicon products.
What does an RTL designer do?
An RTL (Register Transfer Level) designer creates digital circuit designs using hardware description languages like VHDL or Verilog. They develop and verify the logic for integrated circuits, working closely with verification engineers and using simulation tools to ensure correct functionality before manufacturing.
What is the salary of RTL designer?
The salary of an RTL (Register Transfer Level) designer typically ranges from $70,000 to $130,000 annually, depending on experience, location, and industry. Entry-level positions may start lower, while experienced engineers with skills in VHDL or Verilog can earn higher salaries, especially in high-demand tech hubs.
How do I get into RTL design?
To get into RTL design, you should have a strong understanding of digital logic design, hardware description languages like VHDL or Verilog, and experience with FPGA or ASIC development tools. A bachelor's degree in electrical engineering, computer engineering, or a related field is typically required, and gaining hands-on experience through internships or personal projects can be highly beneficial.
What is an RTL Design job?
An RTL (Register Transfer Level) Design job involves designing and implementing digital circuits using hardware description languages (HDLs) like Verilog or VHDL. RTL engineers translate high-level specifications into synthesizable logic, ensuring functionality, power efficiency, and performance. They collaborate with verification engineers to test and debug designs before fabrication. This role is crucial in developing ASICs, FPGAs, and other digital hardware components.
Is RTL design a good career?
RTL (Register Transfer Level) design is a specialized field within digital design and hardware engineering, focusing on creating and optimizing digital circuits using hardware description languages like VHDL or Verilog. It offers opportunities in semiconductor, electronics, and chip design industries, often requiring knowledge of digital logic, verification tools, and hardware development processes. The career can be stable and well-paying for those with technical skills and industry experience.
What are the most commonly searched types of Rtl Design jobs in Florida? The most popular types of Rtl Design jobs in Florida are:
What are popular job titles related to Rtl Design jobs in Florida? For Rtl Design jobs in Florida, the most frequently searched job titles are:
What job categories do people searching Rtl Design jobs in Florida look for? The top searched job categories for Rtl Design jobs in Florida are:
Apple rating
8.0
Based on 675 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
At Apple, we work every day to craft products that enrich people’s lives. If you’re passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design career and challenge yourself in a technical and multi-disciplinary endeavor? If so, this is an exciting position in the world class Apple mixed-signal silicon design team!
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976