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New Grad Asic Design Verification Engineer Jobs (NOW HIRING)

Positron AI

ASIC Design Verification Engineer

$200K - $350K/yr

Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring the functional correctness and performance of our AI inference ASICs. You will be responsible for ...

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$165K - $241K/yr

Influence ASIC architecture and design to enable robust verification and high-quality silicon ... Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.

Broadcom

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... new hire equity grant, but also annual equity awards, connecting your success directly to the ...

Broadcom, Inc.

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... new hire equity grant, but also annual equity awards, connecting your success directly to the ...

Ericsson

ASIC Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

ASIC Design Verification Engineer Austin, Texas This is not a remote work opportunity Hybrid work ... New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year ...

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$165K - $241K/yr

Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...

K2 Space

OR

$190K - $285K/yr

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$152K - $219K/yr

Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing ... New York City Metro Area: $152,500.00 - $252,000.00 Non-Metro New York state & Washington state ...

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All JobsNew Grad Asic Design Verification Engineer Jobs

New Grad Asic Design Verification Engineer information

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$105.5K

$149.2K

$167K

How much do new grad asic design verification engineer jobs pay per year?

As of Jul 18, 2026, the average yearly pay for new grad asic design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What does a New Grad ASIC Design Verification Engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a New Grad ASIC Design Verification Engineer, and why are they important?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

What are some common challenges new graduates face when starting as an ASIC Design Verification Engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.
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What cities are hiring for New Grad Asic Design Verification Engineer jobs? Cities with the most New Grad Asic Design Verification Engineer job openings:
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New Grad Asic Design Verification Engineer jobs near you
Infographic showing various New Grad Asic Design Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 1% Part Time, 2% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

ASIC Design Verification Engineer

Positron AI

Remote

$200K - $350K/yr

Full-time

Re-posted 12 days ago

Job description

About Positron AI
Positron AI specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron exists to create the world's best AI inference systems.
Role Overview
As an ASIC Design Verification Engineer, you will play a critical role in ensuring the functional correctness and performance of our AI inference ASICs. You will be responsible for developing and executing advanced verification methodologies, working closely with design, architecture, and software teams to validate our silicon solutions. This is an opportunity to lead a talented team and contribute to the evolution of AI hardware technology.
Key Responsibilities
  • Develop and execute verification strategies for AI inference ASICs
  • Define and implement comprehensive test plans and verification methodologies
  • Lead the development of verification environments using SystemVerilog UVM
  • Create and maintain simulation testbenches, directed and constrained-random tests
  • Collaborate with design and architecture teams to ensure functional coverage and closure
  • Drive debugging and root cause analysis of design issues in pre-silicon and post-silicon validation
  • Work with FPGA and emulation teams for early hardware validation
  • Manage verification schedules, deliverables, and risk mitigation plans

Required Qualifications
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
  • 8+ years of experience in ASIC verification
  • Expertise in SystemVerilog UVM, and simulation tools
  • Strong knowledge of verification planning, testbench development, and coverage-driven verification
  • Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor Graphics)
  • Hands-on experience with debugging tools, waveform analysis, and scripting (Python, Perl, or TCL)
  • Familiarity with AI/ML accelerators, memory subsystems, and high-speed interconnects
  • Proven track record of successfully verifying complex ASIC designs

Required Qualifications
  • Advanced degree in Electrical or Computer Engineering or related field
  • Experience with hardware-software co-verification
  • Knowledge of formal verification techniques
  • Understanding of post-silicon validation and bring-up methodologies

Leveling & Scope
While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.
Why Join Us?
  • Be part of a rapidly growing AI startup shaping the future of AI hardware
  • Work on groundbreaking technology with a highly skilled and passionate team
  • Competitive salary, equity, and comprehensive benefits package
  • Flexible work environment with remote work options

If you are excited about ensuring the highest quality AI hardware and leading an advanced verification team, we want to hear from you! Apply today.
Compensation and Benefits
The base salary range for this role is $200,000 - $350,000.
Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.
At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.
Equal Opportunity Employer. If you're excited about the role but don't meet every bullet, we'd still love to hear from you.

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