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New Grad Asic Design Verification Engineer Jobs (NOW HIRING)

Broadcom, Inc.

Design Verification Engineer

San Jose, CA · On-site

$143K - $230K/yr

Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... new hire equity grant, but also annual equity awards, connecting your success directly to the ...

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$165K - $241K/yr

Influence ASIC architecture and design to enable robust verification and high-quality silicon ... Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.

Broadcom

Design Verification Engineer

San Jose, CA · On-site

$143K - $230K/yr

Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... new hire equity grant, but also annual equity awards, connecting your success directly to the ...

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$165K - $241K/yr

Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...

Ericsson

ASIC Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

ASIC Design Verification Engineer Austin, Texas This is not a remote work opportunity Hybrid work ... New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year ...

Cisco

ASIC Design Verification Engineer

San Jose, CA

$152K - $219K/yr

Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing ... New York City Metro Area: $152,500.00 - $252,000.00 Non-Metro New York state & Washington state ...

Cisco

ASIC Design Verification Engineer

San Jose, CA

$165K - $241K/yr

Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state ...

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All JobsNew Grad Asic Design Verification Engineer Jobs

New Grad Asic Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do new grad asic design verification engineer jobs pay per year?

As of Jun 26, 2026, the average yearly pay for new grad asic design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What does a New Grad ASIC Design Verification Engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a New Grad ASIC Design Verification Engineer, and why are they important?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

What are some common challenges new graduates face when starting as an ASIC Design Verification Engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.
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Infographic showing various New Grad Asic Design Verification Engineer job openings in the United States as of June 2026, with employment types broken down into 24% Full Time, 71% Part Time, 2% Temporary, and 3% Contract. Highlights an 76% Physical, and 24% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.
ASIC Design Verification Engineer

ASIC Design Verification Engineer

Advanced Micro Devices, Inc

Austin, TX • Hybrid

Full-time

Posted 18 days ago

Advanced Micro Devices rating

8.4

Company rating: 8.4 out of 10

Based on 7 frontline employees who took The Breakroom Quiz

22nd of 139 rated electronics manufacturers

Job description


WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  



THE ROLE 

The AMD UMC Team (part of the MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR/LPDDR technologies powering data center and machine learning workloads. This team is part of the development for tomorrow’s clients, server, embedded, graphics, and semi-custom chips. You will be involved in all aspects of IP verification starting from helping to create a verification architecture, defining test plans, verification environment development, and verification closure/sign-off.

As a key contributor to the success of AMD’s IP, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The NBIO Team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON

I am a strong analytical thinker with excellent problemsolving abilities and keen attention to detail. I work well in team environments and communicate effectively, drawing on solid interpersonal skills. A selfstarter by nature, I independently drive tasks to completion and thrive in fastpaced, multiproject settings that use stateoftheart tools and technologies. I maintain a continuous improvement mindset and bring strong expertise as a verification lead and architect.

KEY RESPONSIBILITIES

  • Collaborate with IP architects to come up with verification architecture and development plans
  • Participate in verification of complex IP blocks and take end-to-end ownership of key features for all projects
  • Work on test plans, verification environment development, regression, and coverage closure
  • Develop modifying and maintaining VIP, libraries, verification environments, testcases (random and directed) using System Verilog/UVM/SystemC
  • Triaging and Debugging Regressions
  • Analyzing code and functional coverage
  • Deploying industry-leading verification methodologies such as UVM and formal Verification
  • Reproducing functional bugs found in post-silicon in dynamic simulation and/or formal verification environments
  • Conducting and participating in code reviews
  • Develop and maintain scripts and tools to continuously improve in engineering infrastructure, methodology and execution

PREFERRED EXPERIENCE

  • ASIC verification experience
  • Strong understanding of digital design and computer architecture
  • Proficient in Verilog, System Verilog, C/C++, UVM, OOP, and working in Linux and Windows environments
  • ASIC design knowledge and be able to debug System Verilog RTL code using simulation tools
  • Experience in security verification would be an asset

ACADEMIC CREDENTIALS

  • BS/MS degree in Engineering (Electrical, Electronics, Computer) or Computer Science.

This role is not eligible for Visa sponsorship.

#LI-DP1

#LI-HYBRID



Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Qualifications:

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Education:UNAVAILABLEEmployment Type: FULL_TIME

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