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New Grad Asic Design Verification Engineer Jobs in Tennessee

USPRO

Senior FPGA Verification Engineer

Lebanon, TN

$85/hr

... FPGA/ASIC design and implementation. • Experience in digital circuit architecture, design ... verification techniques and languages (e.g., constrained random, functional coverage, System ...

USPRO

Senior Digital Design Engineer

Lebanon, TN

$85/hr

A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas ... verification techniques and languages (e.g., constrained random, functional coverage, System ...

USPRO

Senior Embedded FPGA Engineer

Lebanon, TN

$85/hr

... the design, implementation, verification, and integration of a wide variety of high-performance ... A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas ...

CONMED

Design Quality Engineer II

Memphis, TN

Review and approve design verification and design validation protocols and reports. Ensure design ... new industry standards and concepts. * Knowledge of design controls, 21 CFR 820, ISO 13485, ISO ...

MS Technology, Inc.

Systems Engineer

Oak Ridge, TN · On-site

Systems Engineer III owns the end-to-end lifecycle from design inception through as-built verification and field commissioning for a set of assigned systems. Responsibilities Apply systems thinking ...

Ms Technology, Inc

Systems Engineer

Oak Ridge, TN · On-site

Systems Engineer III owns the end-to-end lifecycle from design inception through as-built verification and field commissioning for a set of assigned systems. Responsibilities Apply systems thinking ...

EGS

Systems Engineer

Oak Ridge, TN

Systems Engineer III owns the end-to-end lifecycle from design inception through as-built verification and field commissioning for a set of assigned systems. * Apply systems thinking and a holistic ...

EGS

Systems Engineer

Oak Ridge, TN · On-site

Systems Engineer III owns the end-to-end lifecycle from design inception through as-built verification and field commissioning for a set of assigned systems. * Apply systems thinking and a holistic ...

EGS

Systems Engineer

Oak Ridge, TN

Systems Engineer III owns the end-to-end lifecycle from design inception through as-built verification and field commissioning for a set of assigned systems. * Apply systems thinking and a holistic ...

Bechtel

Systems Engineer

Oak Ridge, TN · On-site

You will perform system-level design verification and test requirements specifications. You will ... Develop system models using Model-Based Systems Engineering methods and tools (e.g., IBM ® ...

Bechtel

Systems Engineer

Oak Ridge, TN · On-site

Coordinates system-level design verification, requirements verification, test ... Master's degree in systems engineering * Experience executing systems engineering with SPEC ...

Quora

$139K - $168K/yr

... our engineers are encouraged to think big and experiment with new ideas. Using continuous ... For Toronto and Vancouver based applicants, the salary range is $139,979 - $168,193 CAD + equity ...

Quora

$139K - $168K/yr

... our engineers are encouraged to think big and experiment with new ideas. Using continuous ... For Toronto and Vancouver based applicants, the salary range is $139,979 - $168,193 CAD + equity ...

Quora

$139K - $168K/yr

... our engineers are encouraged to think big and experiment with new ideas. Using continuous ... For Toronto and Vancouver based applicants, the salary range is $139,979 - $168,193 CAD + equity ...

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All JobsNew Grad Asic Design Verification Engineer JobsNew Grad Asic Design Verification Engineer Jobs in Tennessee

New Grad Asic Design Verification Engineer information

What does a New Grad ASIC Design Verification Engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a New Grad ASIC Design Verification Engineer, and why are they important?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

What are some common challenges new graduates face when starting as an ASIC Design Verification Engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.
What are popular job titles related to New Grad Asic Design Verification Engineer jobs in Tennessee? For New Grad Asic Design Verification Engineer jobs in Tennessee, the most frequently searched job titles are:
What job categories do people searching New Grad Asic Design Verification Engineer jobs in Tennessee look for? The top searched job categories for New Grad Asic Design Verification Engineer jobs in Tennessee are:
What cities in Tennessee are hiring for New Grad Asic Design Verification Engineer jobs? Cities in Tennessee with the most New Grad Asic Design Verification Engineer job openings:
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Infographic showing various New Grad Asic Design Verification Engineer job openings in Tennessee as of July 2026, with employment types broken down into 18% Internship, 70% Full Time, 6% Part Time, and 6% Contract. Highlights an 100% In-person job distribution.
Senior FPGA Verification Engineer

Senior FPGA Verification Engineer

USPRO

Lebanon, TN

$85/hr

Full-time

Posted 5 days ago

Job description

Job Title: Sr FPGA Engineer
Location: El Segundo, CA or Cedar Rapids, IA
Pay Range: $85.00/hour (CA) / $75.00/hour (IA)
Job Description:
Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in the design, implementation, verification, and integration of a wide variety of high-performance digital FPGAs.
Responsibilities:
• Adhere to all applicable Engineering Development and Quality processes, procedures, instructions and guidelines.
• Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.
• Requirements, design and verification of FPGA solutions
• Integration of developed FPGA on target hardware units
• Supporting peer reviews and certification analysis activities
• Peer reviewing FPGA development artifacts
• Management of change request and task assignments through Jira
Required Qualifications:
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.
A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas
• Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.
• Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
• Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).
• Strong debugging and troubleshooting skills for FPGA/ASIC systems.
• Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Preferred
• Excellent communication and teamwork skills with the ability to work in a collaborative environment.
• Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet).
• Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
• Experience in ASIC / FPGA lab validation using advanced laboratory equipment
• Experience with Unix, scripting, C/C++, and/or Perl
Military experience equivalency may substitute for some requirements.
***For consideration for this opportunity, please email your resume to info@uspro.net and include in your message the job title AND five-digit number that follows the job title***
Equal Opportunity Statement:
USPRO is an equal opportunity employer and will consider all applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran, disability and/or other protected categories. We are also committed to providing reasonable accommodation(s) to qualified individuals with disabilities or needs, as required by law.