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Senior Asic Design Engineer Jobs in Tennessee (NOW HIRING)

Job Title : Sr FPGA Engineer Location : El Segundo, CA or Cedar Rapids, IA Pay Range : $85.00/hour ... Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. * Experience in digital circuit ...

Job Title : Sr FPGA Engineer Location : El Segundo, CA or Cedar Rapids, IA Pay Range : $85.00/hour ... Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. * Experience in digital circuit ...

Job Title : Sr FPGA Engineer Location : El Segundo, CA or Cedar Rapids, IA Pay Range : $85.00/hour ... Proficient in VHDL/Verilog for FPGA/ASIC design and implementation. * Experience in digital circuit ...

Senior Mechanical Design Engineer

Oak Ridge, TN · On-site

$86K - $118K/yr

Senior Mechanical Design Engineer Location: Onsite in Oak Ridge, TN Clearance: Ability to obtain and maintain a DOE Q clearance Job Summary The Senior Mechanical Design Engineer in FMD provides ...

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Senior Asic Design Engineer information

See Tennessee salary details

$127.1K

$161.2K

$199.2K

How much do senior asic design engineer jobs pay per year?

As of Aug 7, 2026, the average yearly pay for senior asic design engineer in Tennessee is $161,241.00, according to ZipRecruiter salary data. Most workers in this role earn between $144,300.00 and $177,000.00 per year, depending on experience, location, and employer.

What does a senior ASIC design engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a senior ASIC design engineer?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are some common challenges senior ASIC design engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.
What are the most commonly searched types of Asic Design Engineer jobs in Tennessee? The most popular types of Asic Design Engineer jobs in Tennessee are:
What are popular job titles related to Senior Asic Design Engineer jobs in Tennessee? For Senior Asic Design Engineer jobs in Tennessee, the most frequently searched job titles are:
What cities in Tennessee are hiring for Senior Asic Design Engineer jobs? Cities in Tennessee with the most Senior Asic Design Engineer job openings:
What are popular job titles related to Senior Asic Design Engineer jobs in TN? For Senior Asic Design Engineer jobs in TN, the most frequently searched job titles are:
Infographic showing various Senior Asic Design Engineer job openings in Tennessee as of July 2026, with employment types broken down into 82% Full Time, 6% Part Time, and 12% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $161,241 per year, or $77.5 per hour.

Senior Digital Design Engineer

USPRO

Lebanon, TN

$85/hr

Full-time

Posted 15 days ago


Job description

Job Title: Sr FPGA Engineer
Location: El Segundo, CA or Cedar Rapids, IA
Pay Range: $85.00/hour (CA) / $75.00/hour (IA)
Job Description:
Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in the design, implementation, verification, and integration of a wide variety of high-performance digital FPGAs.
Responsibilities:
• Adhere to all applicable Engineering Development and Quality processes, procedures, instructions and guidelines.
• Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.
• Requirements, design and verification of FPGA solutions
• Integration of developed FPGA on target hardware units
• Supporting peer reviews and certification analysis activities
• Peer reviewing FPGA development artifacts
• Management of change request and task assignments through Jira
Required Qualifications:
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.
A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas
• Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.
• Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
• Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).
• Strong debugging and troubleshooting skills for FPGA/ASIC systems.
• Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Preferred
• Excellent communication and teamwork skills with the ability to work in a collaborative environment.
• Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet).
• Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
• Experience in ASIC / FPGA lab validation using advanced laboratory equipment
• Experience with Unix, scripting, C/C++, and/or Perl
Military experience equivalency may substitute for some requirements.
***For consideration for this opportunity, please email your resume to info@uspro.net and include in your message the job title AND five-digit number that follows the job title***
Equal Opportunity Statement:
USPRO is an equal opportunity employer and will consider all applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran, disability and/or other protected categories. We are also committed to providing reasonable accommodation(s) to qualified individuals with disabilities or needs, as required by law.