RTL Design Engineer
$2.0K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
$2.0K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
$2.0K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 4 years of experience in ASIC RTL design, with a focus on ...
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 4 years of experience in ASIC RTL design, with a focus on ...
Austin, TX · On-site
$181K - $271K/yr
... 2026 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote ... Defining and developing ASIC RTL design and verification at both chip and block levels. * Creating ...
Austin, TX · On-site
$181K - $271K/yr
... 2026 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote ... Defining and developing ASIC RTL design and verification at both chip and block levels. * Creating ...
Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high ... Knowledge of ASIC/SoC design flow * Experience in clock/reset/power domain design * Exposure to ...
Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high ... Knowledge of ASIC/SoC design flow * Experience in clock/reset/power domain design * Exposure to ...
Cupertino, CA · On-site
$2.0K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
Cupertino, CA · On-site
$2.0K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
Boxborough, MA · On-site
$138K/yr
Running RTL and gate-level simulations. * Supporting application engineers and customers on HBM/DDR ... ASIC RTL design and verification experience. * Verilog, PERL, TCL, Python skills. * Static timing ...
Boxborough, MA · On-site
$138K/yr
Running RTL and gate-level simulations. * Supporting application engineers and customers on HBM/DDR ... ASIC RTL design and verification experience. * Verilog, PERL, TCL, Python skills. * Static timing ...
$145K - $195K/yr
RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level ...
$145K - $195K/yr
RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level ...
ASIC Design Engineer In this role, you will be part of the core team designing our next-generation ... RTL Design: Implement high-efficiency logic modules using SystemVerilog/Verilog, focusing on AI ...
ASIC Design Engineer In this role, you will be part of the core team designing our next-generation ... RTL Design: Implement high-efficiency logic modules using SystemVerilog/Verilog, focusing on AI ...
Sunnyvale, CA · On-site
$204K - $306K/yr
General Information Job Title ASIC Digital Design, Sr Manager Job ID 16218 City Sunnyvale State ... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ...
Sunnyvale, CA · On-site
$204K - $306K/yr
General Information Job Title ASIC Digital Design, Sr Manager Job ID 16218 City Sunnyvale State ... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ...
We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to ... Minimum 10+ years of ASIC RTL design and/or architecture experience * Proven track record with the ...
We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to ... Minimum 10+ years of ASIC RTL design and/or architecture experience * Proven track record with the ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... The ideal candidate has hands-on experience across the full ASIC development cycle -- from RTL ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... The ideal candidate has hands-on experience across the full ASIC development cycle -- from RTL ...
Sunnyvale, CA · On-site
... ASIC design. * Experience interacting with software, system hardware, and other cross-functional ... You will design RTL Intellectual Property (IP) with the focus on management and control subsystem ...
Sunnyvale, CA · On-site
... ASIC design. * Experience interacting with software, system hardware, and other cross-functional ... You will design RTL Intellectual Property (IP) with the focus on management and control subsystem ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development ... Design and maintain ASIC development flows spanning RTL-to-GDSII, including RTL generation ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development ... Design and maintain ASIC development flows spanning RTL-to-GDSII, including RTL generation ...
Sunnyvale, CA · Hybrid
$175K - $275K/yr
About The Role As a lead front-end design engineer, you will be a key part of the world-class team ... The role also requires close collaboration and management of external ASIC vendor. You will ...
Sunnyvale, CA · Hybrid
$175K - $275K/yr
About The Role As a lead front-end design engineer, you will be a key part of the world-class team ... The role also requires close collaboration and management of external ASIC vendor. You will ...
Cupertino, CA · On-site
$126K - $190K/yr
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Cupertino, CA · On-site
$126K - $190K/yr
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Irvine, CA · On-site
$132K - $181K/yr
THE OPPORTUNITY Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who ... Experience with wireless communication systems on FPGA or ASIC designs. WORKING CONDITIONS ...
Irvine, CA · On-site
$132K - $181K/yr
THE OPPORTUNITY Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who ... Experience with wireless communication systems on FPGA or ASIC designs. WORKING CONDITIONS ...
Santa Clara, CA · On-site
$175K/yr
The ideal candidate has hands-on experience across the full ASIC development cycle - from RTL ... We are seeking a Senior ASIC Design Engineer with seasonedexperience in the development of high ...
Santa Clara, CA · On-site
$175K/yr
The ideal candidate has hands-on experience across the full ASIC development cycle - from RTL ... We are seeking a Senior ASIC Design Engineer with seasonedexperience in the development of high ...
Sunnyvale, CA · On-site
ASIC/SOC power engineers with experience on tools like PTPX / RTL-A. • We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power ...
Quick apply
Sunnyvale, CA · On-site
ASIC/SOC power engineers with experience on tools like PTPX / RTL-A. • We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power ...
$194K/yr
ASIC Engineer Location: San Jose, CA Duration: 6 Months Minimum Required Skills ... ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal ...
$194K/yr
ASIC Engineer Location: San Jose, CA Duration: 6 Months Minimum Required Skills ... ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal ...
We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to ... Minimum 10+ years of ASIC RTL design and/or architecture experience * Proven track record with the ...
We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to ... Minimum 10+ years of ASIC RTL design and/or architecture experience * Proven track record with the ...
$23.52 is the 25th percentile. Wages below this are outliers.
$14.90 - $25.57
31% of jobs
The median wage is $32.14 / hr.
$25.57 - $36.23
31% of jobs
$36.23 - $46.90
4% of jobs
$56.23 is the 75th percentile. Wages above this are outliers.
$46.90 - $57.56
10% of jobs
$57.56 - $68.23
9% of jobs
$68.23 - $78.89
5% of jobs
$78.89 - $89.55
0% of jobs
$89.55 - $100.22
8% of jobs
$100.22 - $110.88
0% of jobs
$110.88 - $121.55
0% of jobs
$121.55 - $132.21
1% of jobs
$14
$47
$132
$2.0K/mo
Other
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Posted 25 days ago
About Etched
Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.
RTL Design Engineer
As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.
In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched's success.
Representative projects:
You may be a good fit if you:
Strong candidates may also have experience with:
We encourage you to apply even if you do not believe you meet every single qualification.
How we're different:
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Benefits: