* Design and develop package and interconnect methods for Renesas's packaging needs in the areas of Power SiP/modules, flip-chip LGA, multi-chip module with substrate or embedded die/capacitor and ...
* Design and develop package and interconnect methods for Renesas's packaging needs in the areas of Power SiP/modules, flip-chip LGA, multi-chip module with substrate or embedded die/capacitor and ...
* Design and develop package and interconnect methods for Renesas's packaging needs in the areas of Power SiP/modules, flip-chip LGA, multi-chip module with substrate or embedded die/capacitor and ...
Quick apply
* Design and develop package and interconnect methods for Renesas's packaging needs in the areas of Power SiP/modules, flip-chip LGA, multi-chip module with substrate or embedded die/capacitor and ...
Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Developing detailed block & chip level design documents and collateral. Holding and participating in key design reviews and completion of various checklists. Perform silicon evaluation as required.
Developing detailed block & chip level design documents and collateral. Holding and participating in key design reviews and completion of various checklists. Perform silicon evaluation as required.
Staff Digital Design Engineer
Chandler, AZ · On-site
$133K/yr
... chip level design documents and collateral. · Holding and participating in key design reviews and completion of various checklists. · Perform silicon evaluation as required. · Document device ...
Quick apply
Staff Digital Design Engineer
Chandler, AZ · On-site
$133K/yr
... chip level design documents and collateral. · Holding and participating in key design reviews and completion of various checklists. · Perform silicon evaluation as required. · Document device ...
Staff Digital Design Engineer
Chandler, AZ · On-site
$133K/yr
... chip level design documents and collateral. • Holding and participating in key design reviews and completion of various checklists. • Perform silicon evaluation as required. • Document device ...
Staff Digital Design Engineer
Chandler, AZ · On-site
$133K/yr
... chip level design documents and collateral. • Holding and participating in key design reviews and completion of various checklists. • Perform silicon evaluation as required. • Document device ...
Senior Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Senior Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Staff Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Staff Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost * Participating in design reviews and creating the necessary ...
Senior Staff Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Senior Staff Design Verification Engineer
Chandler, AZ · On-site
$133K - $163K/yr
You will be responsible for end-to-end functional verification across block-level and chip-level ... Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and ...
Staff PCB - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Staff PCB - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Design Engineer
Scottsdale, AZ · On-site
As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to interact with cross-functional team of engineers in Design, Application, Corporate R&D, Foundry ...
Design Engineer
Scottsdale, AZ · On-site
As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to interact with cross-functional team of engineers in Design, Application, Corporate R&D, Foundry ...
Staff Board - Package co-design Engineer
Chandler, AZ · Hybrid
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Staff Board - Package co-design Engineer
Chandler, AZ · Hybrid
$198K - $268K/yr
Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance ...
Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter ... Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter ... Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
Chip Design information
See Arizona salary details
$39.1K - $52.7K
4% of jobs
$52.7K - $66.2K
8% of jobs
$76.1K is the 25th percentile. Wages below this are outliers.
$66.2K - $79.7K
17% of jobs
The median wage is $92.2K / yr.
$79.7K - $93.2K
22% of jobs
$93.2K - $106.7K
15% of jobs
$106.7K - $120.2K
6% of jobs
$124.6K is the 75th percentile. Wages above this are outliers.
$120.2K - $133.7K
7% of jobs
$133.7K - $147.2K
7% of jobs
$147.2K - $160.8K
8% of jobs
$160.8K - $174.3K
2% of jobs
$174.3K - $187.8K
2% of jobs
$39.1K
$106.7K
$187.8K
How much do chip design jobs pay per year?
What is a chip design?
A Chip Design job involves creating and developing semiconductor circuits used in electronic devices. Engineers in this field work on designing, verifying, and testing integrated circuits (ICs) to ensure performance, power efficiency, and reliability. They use specialized software tools for designing hardware and optimizing functionality. Chip designers collaborate with cross-functional teams to bring new processors, memory chips, or custom ASICs from concept to production. This role is crucial in industries like computing, telecommunications, and consumer electronics.
What are the key skills and qualifications needed to thrive in chip design?
To excel in Chip Design, a strong background in electrical engineering, digital and analog circuit design, and semiconductor physics is typically required, often supported by a relevant engineering degree. Familiarity with electronic design automation (EDA) tools like Cadence, Synopsys, and Mentor Graphics, as well as proficiency in hardware description languages (HDLs) such as Verilog or VHDL, are standard prerequisites. Outstanding problem-solving skills, attention to detail, and the ability to collaborate closely with cross-functional teams set candidates apart. These competencies are essential for designing efficient, reliable integrated circuits and meeting the evolving needs of the semiconductor industry.
What are the typical career progression opportunities in chip design?
Chip Design offers a clear pathway for career growth, starting from entry-level positions such as Design Engineer or Verification Engineer and progressing to roles like Lead Designer, Project Manager, or Technical Architect. As you gain experience and demonstrate expertise, opportunities often open up in specialized areas such as physical design, timing analysis, or system architecture. Many professionals also advance to leadership or managerial positions, overseeing teams or entire design projects. Additionally, working in such a fast-evolving field keeps you engaged with the latest technologies and can provide options to transition into adjacent areas like product management or application engineering.
How much do chip designers make?
How to get a job in chip design?
Is chip design a good career?
What are the most commonly searched types of Chip Design jobs in Arizona?
The most popular types of Chip Design jobs in Arizona are:
What are popular job titles related to Chip Design jobs in Arizona?
For Chip Design jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Chip Design jobs in Arizona look for?
The top searched job categories for Chip Design jobs in Arizona are:
What cities in Arizona are hiring for Chip Design jobs?
Cities in Arizona with the most Chip Design job openings:

Senior Staff Package Design Engineer
Tempe, AZ
Full-time
Posted 19 days ago
Job description
- Design and develop package and interconnect methods for Renesas's packaging needs in the areas of Power SiP/modules, flip-chip LGA, multi-chip module with substrate or embedded die/capacitor and power device packaging.
- Package technologies qualification for consumer & industrial power as well as automotive power applications.
- Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
- Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec.
- Work with Product groups and Reliability team, qualify new packages and processes within required time frame.
- Resolve all process integration issues by ensuring all window checks are done on critical process steps.
- Establish production controls and monitor to ensure there is no room for quality incidents.
- Ensure smooth transition into production & implement ramp up monitor.
- Work with OSAT/CM to monitor and resolve process issues early in the production stage to ensure only parts with superior quality shipped to customer.
- Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging & flip chip interconnects in LGA.
- Participate in packaging roadmap development & focus on execution.
- Address internal and external customer complains working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.
- Establish & maintain package design rules.
Doctorate/Masters / Bachelor's Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
10-15 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip LGA packaging.
Strong understanding of power SiP/modules which has an substrate or embedded die/capacitor, assembly process knowledge, qualification methods, SPC and statistical analysis software. Knowledge of Cu FSM/BGBM technologies a plus.
Strong interpersonal and communication skills.
Strong analytical and presentation skills.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on worldleading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.