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Director Chip Design Jobs in Arizona (NOW HIRING)

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

... chip level. * Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions. * Create directed and constrained-random test suites to ensure robust ...

Cirrus Logic

Staff Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

... chip level. * Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions. * Create directed and constrained-random test suites to ensure robust ...

Cirrus Logic

Senior Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

... chip level. * Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions. * Create directed and constrained-random test suites to ensure robust ...

Intel

Analog Design Engineering Manager

Phoenix, AZ · On-site

The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... Direct report team will be located in the US and will be about 10-15 engineers. This role is also ...

Amkor Technology

Director, Chiplets/FCBGA BU

Tempe, AZ · On-site

Flip Chip package design and OSAT experience will be a plus. * Experience working with external customers is highly preferred. Location: Tempe, AZ. This position has a hybrid schedule. Candidates ...

Amat

Senior Workplace Design Manager

Phoenix, AZ · On-site +1

$116K - $159K/yr

... every new chip and advanced display in the world. We design, build and service cutting-edge ... Demonstrated ability to direct/coach teams and provide feedback. Proficient with MS Office ...

Amat

Senior Director, Operations

Tempe, AZ

$180K - $247K/yr

... every new chip and advanced display in the world. We design, build and service cutting-edge ... What You'll Do The Senior Director of Operations is responsible for leading manufacturing ...

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Director Chip Design information

What are some common challenges a Director of Chip Design faces when leading multidisciplinary engineering teams?

A Director of Chip Design often manages teams that include digital, analog, verification, and layout engineers, making cross-functional communication and alignment essential. One common challenge is balancing project timelines with the need for innovation and rigorous testing to ensure chip reliability and performance. Additionally, staying ahead of rapidly evolving semiconductor technologies and managing resources across multiple concurrent projects can be demanding. Effective directors foster a collaborative environment, resolve technical conflicts, and ensure that all teams work towards shared goals.

What are the key skills and qualifications needed to thrive as a Director of Chip Design, and why are they important?

To thrive as a Director of Chip Design, you need deep expertise in semiconductor design, electrical engineering, and project management, typically backed by an advanced degree and significant industry experience. Familiarity with EDA tools like Cadence or Synopsys, knowledge of ASIC/FPGA design flows, and relevant certifications are often required. Exceptional leadership, strategic thinking, and communication skills help drive innovation and coordinate cross-functional teams. These competencies ensure the successful delivery of complex chip projects that meet technical, budget, and time objectives in a highly competitive industry.

What does a Director of Chip Design do?

A Director of Chip Design oversees the entire process of designing integrated circuits (ICs) or microchips, managing teams of engineers and ensuring that projects meet technical and business requirements. This role involves setting the vision and strategy for chip development, collaborating with cross-functional teams, and ensuring timely delivery of high-quality products. The director is responsible for resource allocation, project management, and fostering innovation to keep up with industry trends. Additionally, they ensure compliance with industry standards and drive continuous improvement in design methodologies.
What are the most commonly searched types of Chip Design jobs in Arizona? The most popular types of Chip Design jobs in Arizona are:
What are popular job titles related to Director Chip Design jobs in Arizona? For Director Chip Design jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Director Chip Design jobs in Arizona look for? The top searched job categories for Director Chip Design jobs in Arizona are:
What cities in Arizona are hiring for Director Chip Design jobs? Cities in Arizona with the most Director Chip Design job openings:
Director Chip Design jobs near you

Design Verification Engineer

Cirrus Logic

Chandler, AZ • On-site

$133K - $163K/yr

Full-time

Re-posted 18 days ago

Job description

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems and applications engineers, firmware/software teams, and manufacturing test to deliver high-quality mixed-signal IC solutions. You will be responsible for end-to-end functional verification across block-level and chip-level designs, contributing to advanced verification methodologies and infrastructure.
This position offers exposure to multiple verification domains including UVM-based testbench development, formal verification, hardware emulation/acceleration, gate-level simulations, and software-driven verification in a highly collaborative and technically rigorous environment.
Responsibilities:
  • Develop comprehensive verification plans aligned with design and system requirements.
  • Perform functional verification of custom mixed-signal ASICs at block and chip level.
  • Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions.
  • Create directed and constrained-random test suites to ensure robust functional coverage.
  • Implement, analyze, and drive functional and code coverage, including coverage closure.
  • Conduct failure analysis, regression triage, and debug, resolving functional and timing-related issues.
  • Run and debug gate-level simulations, including timing violations and back-annotation issues.
  • Develop and maintain digital and mixed-signal behavioral models to support verification.
  • Support verification flow and infrastructure development, including regressions and automation.
  • Collaborate cross-functionally with digital/analog design, systems, applications, firmware/software, and manufacturing test teams.
  • Contribute to both pre-silicon verification and post-silicon validation efforts.
  • Proactively improve verification methodologies, processes, and best practices.

Required Knowledge, Skills, and Experience:
  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.
    • Bachelor's with 2+ years of relevant experience.
    • Master's with 0+ years of relevant experience.
  • Significant industry experience in silicon design and/or ASIC verification.
  • Strong proficiency with HDLs: Verilog and/or VHDL.
  • Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM/Vera).
  • Solid understanding of digital design principles and system architecture.
  • Hands-on experience with:
    • Testbench architecture and stimulus generation
    • Regression execution and debug
    • Coverage analysis and closure
  • Ability to work effectively in a cross-disciplinary, team-oriented environment.

Preferred Knowledge, Skills, and Experience:
  • Experience verifying mixed-signal ASICs in complex SoC environments.
  • Knowledge of signal processing concepts relevant to mixed-signal designs.
  • Experience with SystemVerilog Assertions (SVA).
  • Exposure to or hands-on experience with:
    • Formal verification
    • Hardware emulation or acceleration
    • Software-driven verification
  • Demonstrated ability to evaluate, debug, and improve verification flows and methodologies.

#LI-Hybrid
#LI-EK1
#HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.

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