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Asic Engineer Jobs (NOW HIRING)

Eridu AI

RTL Engineer, Networking ASIC

Saratoga, CA · On-site

$210K - $275K/yr

... developers. Qualifications * ME/BE with a minimum of 8-15 years of experience. * Hands-on knowledge of SystemVerilog and Verilog is mandatory . * Solid understanding of ASIC design methodologies ...

Neuralink

Software Engineer, ASIC

Austin, TX · On-site

$123K - $216K/yr

Software Engineer, ASIC South San Francisco, California, United States About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to ...

Neuralink

Software Engineer, ASIC

South San Francisco, CA

$199K/yr

As a Software Engineer, ASIC, you will integrate tightly with teams across the company, and span all layers of the work environment stack, from deployment of physical hardware on the manufacturing ...

USM

JB061568 - Lead ASIC DFT Engineer

San Jose, CA · On-site

$194K/yr

Skills ASIC DFT, Visa Types Green Card, US Citiz.. Required Skills & Qualifications * Strong hands-on experience in ASIC DFT with end-to-end ownership. * Solid understanding of DFT fundamentals ...

Nvidia

Senior ASIC AI Engineer

Santa Clara, CA

NVIDIA is looking for an outstanding and motivated Senior ASIC AI Engineer to develop high performance Agentic AI systems to boost productivity of GPU ASIC design flows . This role offers a chance to ...

Neuralink

Software Engineer, ASIC

South San Francisco, CA · On-site

$123K - $216K/yr

As a Software Engineer, ASIC, you will integrate tightly with teams across the company, and span all layers of the work environment stack, from deployment of physical hardware on the manufacturing ...

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Asic Engineer information

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$82.5K

$158.2K

$167.5K

How much do asic engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for asic engineer in the United States is $158,244.00, according to ZipRecruiter salary data. Most workers in this role earn between $166,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What Is an ASIC Engineer?

An ASIC Engineer works with the design and verification of an Application-Specific Integrated Circuit (ASIC). This type of integrated circuit is designed for a specified purpose, like digital voice recording or cryptocurrency mining. An ASIC engineer has experience and skills that they use to program the integrated circuit based on defined requirements. They are capable of designing and producing ASICs that have over 100 million logic gates.

What are some typical challenges faced by ASIC Engineers during the design and verification process?

ASIC Engineers often face challenges such as meeting tight performance, power, and area constraints while ensuring design correctness. Debugging complex issues during simulation and post-silicon validation can be time-consuming and require strong problem-solving skills. Additionally, coordinating with cross-functional teams—such as software, hardware, and verification engineers—is crucial to resolve integration issues and keep projects on schedule. Staying updated with evolving EDA tools and industry standards is also important for success in this role.

What are ASIC engineers?

ASIC engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are customized microchips built for a particular use or product rather than general-purpose use. Their work involves creating circuit designs, verifying and simulating chip functions, and collaborating with other engineers to ensure the chip meets performance, power, and area requirements. ASIC engineers play a crucial role in industries like telecommunications, consumer electronics, automotive, and more, enabling devices to perform specialized tasks efficiently.

What is the difference between Asic Engineer vs FPGA Engineer?

AspectAsic EngineerFPGA Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or VLSI certificationsBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; similar certifications
Work EnvironmentDesigning and developing custom integrated circuits in labs or design centersImplementing and testing FPGA designs in labs or development environments
Industry UsageUsed in semiconductor companies, electronics manufacturers, and high-performance computingCommon in prototyping, testing, and flexible hardware solutions across industries

While both roles involve digital design and hardware development, Asic Engineers focus on creating custom chips for mass production, whereas FPGA Engineers work on programmable hardware for testing and rapid prototyping. The skills and certifications overlap, but their work environments and end goals differ significantly.

What are the key skills and qualifications needed to thrive as an ASIC Engineer, and why are they important?

To thrive as an ASIC Engineer, you need a solid background in digital design, hardware description languages (HDLs) like Verilog or VHDL, and a relevant degree in electrical engineering or a related field. Familiarity with electronic design automation (EDA) tools, simulation software, and knowledge of the ASIC design flow are typically required, with certifications in hardware design being advantageous. Strong problem-solving abilities, attention to detail, and effective communication skills help set top performers apart. These skills are essential for delivering reliable, efficient chip designs while collaborating with cross-functional teams and meeting project specifications.
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Asic Engineer jobs near you
Infographic showing various Asic Engineer job openings in the United States as of May 2026, with employment types broken down into 50% Full Time, and 50% Part Time. Highlights an 86% Physical, 9% Hybrid, and 5% Remote job distribution, with an average salary of $158,244 per year, or $76.1 per hour.

RTL Engineer, Networking ASIC

Eridu AI

Saratoga, CA • On-site

$210K - $275K/yr

Full-time

Posted 21 days ago

Job description

About Eridu
Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI. Today's AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.
The company's solutions and value proposition have been widely validated by leading hyperscalers.
Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world's leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.
Visit our website eridu.ai to learn more.
Position Overview
We are seeking experienced RTL designers to help define and implement our industry-leading Networking ASIC's. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking chips.
Responsibilities
  • Packet buffering, queuing, and scheduling: Work on micro architecture and design implementation of high-speed networking ASIC's, focusing on latency optimization and quality of service (QoS) support. Prior experience with on-chip memory subsystem and scheduling / arbitration design.
  • Implementation and Testing: Implement designs on ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Work with verification team to conduct thorough testing and validation to ensure functionality and reliability.
  • Performance Optimization: Analyze and optimize pipelining architectures to improve performance metrics.
  • Protocol Support: Provide support for various networking protocols such as Ethernet and IP protocols, and high speed interconnects such as UCIe.
  • Troubleshooting and Debugging: Investigate and resolve complex issues related to packet queuing, working closely with cross-functional teams, including system architects, hardware engineers, and firmware developers.

Qualifications
  • ME/BE with a minimum of 8-15 years of experience.
  • Hands-on knowledge of SystemVerilog and Verilog is mandatory.
  • Solid understanding of ASIC design methodologies, including simulation, verification, synthesis, and timing adjustments.
  • Proven expertise in designing and optimizing scheduling and QoS mechanisms.
  • Experience with Ethernet and IP protocols.
  • Strong analytical and problem-solving abilities, with meticulous attention to detail in troubleshooting and debugging complex networking issues.
  • Excellent verbal and written communication skills, with the ability to collaborate effectively in a team environment and present technical information to diverse audiences.

Why Join Us?
At Eridu, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Notice to Recruiting Agencies
Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.
The pay range for this role is:
210,000 - 275,000 USD per year (San Francisco Bay Area)

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