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Asic Engineer Jobs (NOW HIRING)

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160K - $192K/yr

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...

In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...

... ASIC Engineer-related occupation. Position also requires experience in: 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools:

ASIC Test Engineer

San Jose, CA

$194K/yr

ASIC Test Engineer ASIC Test Engineer for industrialization of new products Imec imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of ...

ASIC Test Engineer

San Jose, CA · On-site

$194K/yr

ASIC Test Engineer ASIC Test Engineer for industrialization of new products Imec imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of ...

Sr. Digital ASIC Engineer

Hillsboro, OR · On-site

$91K - $177K/yr

Job Title: Sr. Digital ASIC Engineer Posting Start Date: 6/9/26 Job Location(s): Hillsboro If you are looking for a challenging and exciting career in the world of technology, then look no further.

OR · Hybrid

In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...

In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...

ASIC Engineer 4

Minneapolis, MN · On-site

$195K - $247K/yr

... ASIC Engineer-related occupation. Position also requires experience in: 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools:

Requisition ID: 77738 Description This position is for an experienced digital design engineer ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...

Principal ASIC Engineer

San Jose, CA · On-site

$233K - $336K/yr

... Engineer-related occupation. Position requires: 1. Perl, Python, PCIE, NVME, UVM, and System Verilog. 2. ASIC simulation tools and verification methods. 3. Defining verification architecture ...

Principal ASIC Engineer

San Jose, CA · On-site

$233K - $336K/yr

... Engineer-related occupation. Position requires: 1. Perl, Python, PCIE, NVME, UVM, and System Verilog. 2. ASIC simulation tools and verification methods. 3. Defining verification architecture ...

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Asic Engineer information

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$82.5K

$158.2K

$167.5K

How much do asic engineer jobs pay per year?

As of Jun 29, 2026, the average yearly pay for asic engineer in the United States is $158,244.00, according to ZipRecruiter salary data. Most workers in this role earn between $166,000.00 and $166,000.00 per year, depending on experience, location, and employer.

Is ASIC engineering in high demand?

ASIC engineering is in high demand due to the growth of semiconductor and electronics industries, especially in areas like consumer electronics, telecommunications, and automotive systems. Skilled ASIC engineers with knowledge of hardware description languages and verification tools are sought after, and the field offers strong job stability and competitive salaries.

What Is an ASIC Engineer?

An ASIC Engineer works with the design and verification of an Application-Specific Integrated Circuit (ASIC). This type of integrated circuit is designed for a specified purpose, like digital voice recording or cryptocurrency mining. An ASIC engineer has experience and skills that they use to program the integrated circuit based on defined requirements. They are capable of designing and producing ASICs that have over 100 million logic gates.

What are some typical challenges faced by ASIC Engineers during the design and verification process?

ASIC Engineers often face challenges such as meeting tight performance, power, and area constraints while ensuring design correctness. Debugging complex issues during simulation and post-silicon validation can be time-consuming and require strong problem-solving skills. Additionally, coordinating with cross-functional teams—such as software, hardware, and verification engineers—is crucial to resolve integration issues and keep projects on schedule. Staying updated with evolving EDA tools and industry standards is also important for success in this role.

How much does an ASIC engineer make?

The average salary for an ASIC engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and industry. Senior ASIC engineers with specialized skills or certifications can earn higher compensation, often exceeding $180,000 per year.

What are ASIC engineers?

ASIC engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are customized microchips built for a particular use or product rather than general-purpose use. Their work involves creating circuit designs, verifying and simulating chip functions, and collaborating with other engineers to ensure the chip meets performance, power, and area requirements. ASIC engineers play a crucial role in industries like telecommunications, consumer electronics, automotive, and more, enabling devices to perform specialized tasks efficiently.

What is the difference between Asic Engineer vs FPGA Engineer?

AspectAsic EngineerFPGA Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or VLSI certificationsBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; similar certifications
Work EnvironmentDesigning and developing custom integrated circuits in labs or design centersImplementing and testing FPGA designs in labs or development environments
Industry UsageUsed in semiconductor companies, electronics manufacturers, and high-performance computingCommon in prototyping, testing, and flexible hardware solutions across industries

While both roles involve digital design and hardware development, Asic Engineers focus on creating custom chips for mass production, whereas FPGA Engineers work on programmable hardware for testing and rapid prototyping. The skills and certifications overlap, but their work environments and end goals differ significantly.

What does a ASIC engineer do?

An ASIC engineer designs, develops, and tests application-specific integrated circuits used in electronic devices. They work with hardware description languages like VHDL or Verilog, collaborate with cross-functional teams, and ensure the chips meet performance and power specifications. Proficiency in digital design, simulation tools, and understanding of manufacturing processes are essential for this role.

What are the key skills and qualifications needed to thrive as an ASIC Engineer, and why are they important?

To thrive as an ASIC Engineer, you need a solid background in digital design, hardware description languages (HDLs) like Verilog or VHDL, and a relevant degree in electrical engineering or a related field. Familiarity with electronic design automation (EDA) tools, simulation software, and knowledge of the ASIC design flow are typically required, with certifications in hardware design being advantageous. Strong problem-solving abilities, attention to detail, and effective communication skills help set top performers apart. These skills are essential for delivering reliable, efficient chip designs while collaborating with cross-functional teams and meeting project specifications.

What engineers make $500,000?

Senior engineers in specialized fields such as software engineering, petroleum engineering, and certain executive-level engineering roles can earn $500,000 or more annually, especially with experience, bonuses, and stock options. High compensation often requires advanced skills, certifications, and working in high-demand industries or leadership positions.
What cities are hiring for Asic Engineer jobs? Cities with the most Asic Engineer job openings:
What are the most commonly searched types of Asic Engineer jobs? The most popular types of Asic Engineer jobs are:
Who are the top companies hiring for Asic Engineer jobs? The top employers for Asic Engineer jobs are:
What states have the most Asic Engineer jobs? States with the most job openings for Asic Engineer jobs include:
Infographic showing various Asic Engineer job openings in the United States as of June 2026, with employment types broken down into 97% Full Time, and 3% Contract. Highlights an 89% Physical, 7% Hybrid, and 4% Remote job distribution, with an average salary of $158,244 per year, or $76.1 per hour.
Sr. Engineer, ASIC Design

Sr. Engineer, ASIC Design

Ayar Labs

San Jose, CA

$160K - $192K/yr

Full-time

Posted 8 days ago


Key responsibilities

  • Develop and optimize RTL designs for use in complex digital systems.

  • Develop verification methodology and testbenches for digital and mixed-signal blocks.

  • Perform bringup, evaluation, and debug of in-house custom silicon using python scripting, firmware, and control systems.


Job description

Engineer, ASIC Design
Location: San Jose (on-site)
Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models.
Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.

The ASIC Engineer is responsible for design and integration of complex SoCs with both high-speed custom and digital blocks. You will work in a dynamic startup environment as part of a small IC design team, covering roles from custom circuit design to optical device design. Each team member is expected to contribute across a broad range of tasks and to gain new skill sets to grow with the company. The ideal candidate is a hands-on self-starter who can craft specifications based on input from colleagues, customers, and industry and who can effectively manage his or her own time to take projects to completion with limited supervision and guidance.
KEY RESPONSIBILITIES:
  • Develop and optimize RTL designs for use in complex digital systems
  • Develop verification methodology and testbenches for digital and mixed-signal blocks
  • Bringup, evaluation, and debug of in-house custom silicon using python scripting, firmware, and control systems
  • Create clear documentation of their designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff
Required Skills:
  • BS in Electrical Engineering, Computer Engineering, or related fields
  • 1+ years of work or academic experience in ASIC design
  • History of assuming responsibility for a variety of technical tasks and completing projects independently
  • Proficient in Verilog for both RTL design and verification
  • Proficient in ASIC verification (XCelium, VCS, Questa) tools
  • Proficient in scripting or programming languages

Preferred Skills:
  • MS in Electrical Engineering, Computer Engineering, or related fields
  • Proficient in writing timing constraints and deep understanding of timing analysis
  • Experience working on digital designs with multiple clock domains and clock dividers
  • Working knowledge integrating custom blocks in a digital-top flow (LEF, lib, etc.)
  • Performed silicon bring-up, debug, and evaluation
  • Programming experience in Python, low-level languages (C, C++)
  • Some knowledge of optics and control systems
Salary Range: $160,000 - $192,000
NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers.

Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.