Sr. Engineer, ASIC Design
$160K - $192K/yr
Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...
$160K - $192K/yr
Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...
$160K - $192K/yr
Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...
San Jose, CA · On-site
$194K/yr
Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote however once/month in office. PST time zone preferred Designation: Associate Experience Required: * 10+ years of hands-on ...
Quick apply
San Jose, CA · On-site
$194K/yr
Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote however once/month in office. PST time zone preferred Designation: Associate Experience Required: * 10+ years of hands-on ...
San Jose, CA · On-site
$160K - $192K/yr
Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...
San Jose, CA · On-site
$160K - $192K/yr
Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...
In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...
In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...
$195K - $247K/yr
... ASIC Engineer-related occupation. Position also requires experience in: 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools:
$195K - $247K/yr
... ASIC Engineer-related occupation. Position also requires experience in: 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools:
$194K/yr
ASIC Test Engineer ASIC Test Engineer for industrialization of new products Imec imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of ...
$194K/yr
ASIC Test Engineer ASIC Test Engineer for industrialization of new products Imec imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of ...
San Jose, CA · On-site
$194K/yr
ASIC Test Engineer ASIC Test Engineer for industrialization of new products Imec imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of ...
San Jose, CA · On-site
$194K/yr
ASIC Test Engineer ASIC Test Engineer for industrialization of new products Imec imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of ...
Hillsboro, OR · On-site
$91K - $177K/yr
Job Title: Sr. Digital ASIC Engineer Posting Start Date: 6/9/26 Job Location(s): Hillsboro If you are looking for a challenging and exciting career in the world of technology, then look no further.
Hillsboro, OR · On-site
$91K - $177K/yr
Job Title: Sr. Digital ASIC Engineer Posting Start Date: 6/9/26 Job Location(s): Hillsboro If you are looking for a challenging and exciting career in the world of technology, then look no further.
San Diego, CA · On-site
$160K - $260K/yr
Principal Electrical Engineer, ASIC Program Lead Department: Location: On-Site - San Diego, CA Employment Type: Full-Time Experience Required: 12+ years About the Role Our next-generation system will ...
Quick apply
San Diego, CA · On-site
$160K - $260K/yr
Principal Electrical Engineer, ASIC Program Lead Department: Location: On-Site - San Diego, CA Employment Type: Full-Time Experience Required: 12+ years About the Role Our next-generation system will ...
OR · Hybrid
In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...
San Jose, CA · On-site +1
$192K/yr
Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote, PST time zone preferred Contract Term: Contract Experience Required: * 10+ years of hands-on experience in ASIC Design-for-Test (DFT ...
San Jose, CA · On-site +1
$192K/yr
Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote, PST time zone preferred Contract Term: Contract Experience Required: * 10+ years of hands-on experience in ASIC Design-for-Test (DFT ...
Santa Clara, CA · Hybrid
In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...
Santa Clara, CA · Hybrid
In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design. * Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing ...
Minneapolis, MN · On-site
$195K - $247K/yr
... ASIC Engineer-related occupation. Position also requires experience in: 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools:
Minneapolis, MN · On-site
$195K - $247K/yr
... ASIC Engineer-related occupation. Position also requires experience in: 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools:
Sunnyvale, CA · On-site
This is a hands-on role that's ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing ...
Sunnyvale, CA · On-site
This is a hands-on role that's ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing ...
Come work at Amazon! We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Leo ...
Come work at Amazon! We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Leo ...
Sunnyvale, CA · On-site +1
This is a hands-on role that's ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing ...
Sunnyvale, CA · On-site +1
This is a hands-on role that's ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing ...
$91K - $177K/yr
Requisition ID: 77738 Description This position is for an experienced digital design engineer ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...
$91K - $177K/yr
Requisition ID: 77738 Description This position is for an experienced digital design engineer ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...
Come work at Amazon! We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Leo ...
Come work at Amazon! We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Leo ...
San Jose, CA · On-site
$233K - $336K/yr
... Engineer-related occupation. Position requires: 1. Perl, Python, PCIE, NVME, UVM, and System Verilog. 2. ASIC simulation tools and verification methods. 3. Defining verification architecture ...
San Jose, CA · On-site
$233K - $336K/yr
... Engineer-related occupation. Position requires: 1. Perl, Python, PCIE, NVME, UVM, and System Verilog. 2. ASIC simulation tools and verification methods. 3. Defining verification architecture ...
San Jose, CA · On-site
$233K - $336K/yr
... Engineer-related occupation. Position requires: 1. Perl, Python, PCIE, NVME, UVM, and System Verilog. 2. ASIC simulation tools and verification methods. 3. Defining verification architecture ...
San Jose, CA · On-site
$233K - $336K/yr
... Engineer-related occupation. Position requires: 1. Perl, Python, PCIE, NVME, UVM, and System Verilog. 2. ASIC simulation tools and verification methods. 3. Defining verification architecture ...
$82.5K - $90.2K
4% of jobs
$90.2K - $98K
4% of jobs
$98K - $105.7K
0% of jobs
$105.7K - $113.4K
0% of jobs
$113.4K - $121.1K
0% of jobs
$121.1K - $128.9K
0% of jobs
$128.9K - $136.6K
4% of jobs
$136.6K - $144.3K
2% of jobs
$144.3K - $152K
0% of jobs
$152K - $159.8K
0% of jobs
$160.7K is the 25th percentile. Wages below this are outliers.
$159.8K - $167.5K
85% of jobs
$82.5K
$158.2K
$167.5K
An ASIC Engineer works with the design and verification of an Application-Specific Integrated Circuit (ASIC). This type of integrated circuit is designed for a specified purpose, like digital voice recording or cryptocurrency mining. An ASIC engineer has experience and skills that they use to program the integrated circuit based on defined requirements. They are capable of designing and producing ASICs that have over 100 million logic gates.
| Aspect | Asic Engineer | FPGA Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or VLSI certifications | Bachelor's or Master's in Electrical Engineering, Digital Design, or related fields; similar certifications |
| Work Environment | Designing and developing custom integrated circuits in labs or design centers | Implementing and testing FPGA designs in labs or development environments |
| Industry Usage | Used in semiconductor companies, electronics manufacturers, and high-performance computing | Common in prototyping, testing, and flexible hardware solutions across industries |
While both roles involve digital design and hardware development, Asic Engineers focus on creating custom chips for mass production, whereas FPGA Engineers work on programmable hardware for testing and rapid prototyping. The skills and certifications overlap, but their work environments and end goals differ significantly.

Develop and optimize RTL designs for use in complex digital systems.
Develop verification methodology and testbenches for digital and mixed-signal blocks.
Perform bringup, evaluation, and debug of in-house custom silicon using python scripting, firmware, and control systems.
Sourced by ZipRecruiter
Computer and peripheral equipment manufacturing
51 - 200 Employees
San Jose, CA, US
2015