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Physical Digital Design Engineer Intern
Monolithic Power Systems Glendora, NJ

Physical Digital Design Engineer Intern

Monolithic Power Systems
Glendora, NJ
  • Other
Job Description

Physical Digital Design Engineer Intern



Who we are

We are creative thinkers. We break boundaries. We take technology to new levels. As a leading international semiconductor company, Monolithic Power Systems (MPS) creates cutting-edge solutions to improve the quality of life with green, easy-to-use products.

What we do

We make power design fun! With our innovative proprietary technology processes, we thrive on re-imagining and re-defining the possibilities of high-performance power solutions in industrial applications, telecom infrastructures, cloud computing, automotive, and consumer applications.

Who we look for

A Jr. Digital Physical Design Engineer Intern to assist in the development, design, and physical implementation of digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. Products to be designed may include power management, signal management and mixed signal functions.

Task:

  • Contribute to the design, development, & physical implementation of digital/mixed-signal IC’s.

  • Work closely under the supervision of Senior Digital Designers and Physical Designers.

  • Development and Review of Synthesis and P&R SDC Constraints.

  • Synthesis Flow.

  • Perform Logical Equivalence Check.

  • P&R Flow.

  • Power and IR Drop Analysis.

  • DFT Implementation and Metrics Analysis.

  • Close collaboration with the CAD and Technology Development Groups.

Qualifications:

  • Bachelor/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework.

  • Has the ability to follow instructions/tasks according to design specifications/procedures.

  • Basic knowledge of ASIC development process and digital design techniques.

  • Executing tasks that hit project milestone.

  • Good written/verbal communication skills and strong team work/collaboration.

  • Knowledge/Experience with the following is a plus:

  • SCAN, IDDQ, Delay Fault. MBIST and LBIST DFT Modes.

  • Knowledge of standard behavioral/RTL coding languages (Verilog and SystemVerilog).

  • I2C, SPI, USB, PMBUS

  • Scripting and automation languages like TCL, Python and C/C++.

Address

Monolithic Power Systems

Glendora, NJ
08029 USA

Industry

Construction

Posted date

20 days ago

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Monolithic Power Systems job posting for a Physical Digital Design Engineer Intern in Glendora, NJ with a salary of $130,900 to $134,800 Yearly with a map of Glendora location.