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Senior Dft Engineer Jobs (NOW HIRING)

Senior DfT Engineer

Chandler, AZ ยท On-site

$120 - $160/hr

## Senior DfT EngineerApplylocations: Chandler (Office)time type: Full timeposted on: Posted Todayjob requisition id: R-10064841As a DfT engineer, you will join a highly experienced team. Your key ...

Sr. DFT Engineer (Remote)

San Jose, CA ยท On-site

$122K - $168K/yr

Role: Sr. DFT Engineer Location: San Jose, CA-Remote Experience: 5+ Years Seeking Candidate Exposure with ATGP and SSM / SSN (Streaming Scan Network) developed by Siemens (Tessent) which Decouples ...

Senior DFT Engineer

Santa Clara, CA ยท On-site

$122K - $168K/yr

At NVIDIA, our Senior DFT Engineers lead the way in silicon test innovation, ensuring flawless execution and outstanding quality in our next-generation silicon platforms. This is an outstanding ...

Senior DFT Engineer

OR ยท On-site +1

$170K - $250K/yr

The Role We are seeking a highly experienced Senior Design-for-Test (DFT) Engineer to lead and drive DFT architecture and implementation for complex mixed-signal SOCs. This role requires deep ...

The Role We are seeking a highly experienced Senior Design-for-Test (DFT) Engineer to lead and drive DFT architecture and implementation for complex mixed-signal SOCs. This role requires deep ...

Senior DFT Engineer

$170K - $250K/yr

The Role We are seeking a highly experienced Senior Design-for-Test (DFT) Engineer to lead and drive DFT architecture and implementation for complex mixed-signal SOCs. This role requires deep ...

The Role We are seeking a highly experienced Senior Design-for-Test (DFT) Engineer to lead and drive DFT architecture and implementation for complex mixed-signal SOCs. This role requires deep ...

Senior DFT Engineer

Santa Clara, CA ยท On-site

$122K - $168K/yr

At NVIDIA, our Senior DFT Engineers lead the way in silicon test innovation, ensuring flawless execution and outstanding quality in our next-generation silicon platforms. This is an outstanding ...

Senior DFT Engineer

Saratoga, CA ยท On-site

$120 - $220/hr

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

As a DfT engineer, you will join a highly experienced team. Your key responsibilities will be: 1) Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product ...

Senior DFT Engineer

Saratoga, CA ยท On-site

$120K - $220K/yr

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

As a DfT engineer, you will join a highly experienced team. Your key responsibilities will be: 1) Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product ...

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

Senior DFT Engineer

Seattle, WA ยท On-site

$170K - $250K/yr

The Role We are seeking a highly experienced Senior Design-for-Test (DFT) Engineer to lead and drive DFT architecture and implementation for complex mixed-signal SOCs. This role requires deep ...

Senior DFT Engineer

Santa Clara, CA ยท On-site

$122K - $168K/yr

We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today.

Senior DFT Engineer

Santa Clara, CA ยท On-site

$121K - $167K/yr

We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today.

Senior DFT Engineer (Einfochips)

San Jose, CA ยท On-site

$122K - $168K/yr

Senior DFT Engineer (Einfochips) What You'll Be Doing: * DFT implementation for 3nm and 5nm Networking chips, IP DFT work * RTL checks for scan-insertion compatibility using Synopsys Spyglass * Scan ...

Senior DFT Engineer

Santa Clara, CA ยท Hybrid

$122K - $168K/yr

We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today.

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Showing results 1-20

Senior Dft Engineer information

See salary details

$59.5K

$126.6K

$183.5K

How much do senior dft engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for senior dft engineer in the United States is $126,557.00, according to ZipRecruiter salary data. Most workers in this role earn between $104,500.00 and $143,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior DFT engineer, and why are they important?

To thrive as a Senior DFT Engineer, you need deep expertise in digital design, test methodologies, and semiconductor fundamentals, typically supported by a degree in electrical or computer engineering and several years of related experience. Proficiency with EDA tools such as Synopsys Tetramax, Mentor Tessent, and scripting languages like Python or TCL is essential, alongside knowledge of industry standards like IEEE 1149.1 (JTAG). Strong analytical thinking, problem-solving abilities, and collaborative communication skills distinguish top performers in this role. These skills ensure robust test coverage, efficient debugging, and successful delivery of complex integrated circuits in high-stakes environments.

What are some common challenges Senior DFT engineers face when integrating DFT methodologies into complex chip designs?

Senior DFT Engineers often encounter challenges such as balancing test coverage with minimal impact on area, performance, and power consumption. Integrating scan chains, boundary scan, and built-in self-test (BIST) requires close collaboration with RTL designers and verification teams to ensure testability features are implemented without introducing timing violations or design bottlenecks. Additionally, maintaining up-to-date knowledge of industry-standard DFT tools and methodologies, and managing tight project timelines while ensuring high-quality deliverables, are ongoing aspects of the role.

What is a Senior DFT engineer?

Senior DFT (Design for Test) Engineers are experienced professionals who specialize in designing and implementing testability features in integrated circuits (ICs) or systems-on-chip (SoCs). Their primary goal is to ensure that chips can be efficiently and thoroughly tested during manufacturing to detect and diagnose defects. They work on techniques such as scan insertion, built-in self-test (BIST), boundary scan, and test compression. Senior DFT Engineers typically collaborate with design, verification, and manufacturing teams to improve test coverage and reduce costs. Their expertise is crucial for delivering high-quality semiconductor products.

What is the difference between Senior Dft Engineer vs Dft Engineer?

AspectSenior Dft EngineerDft Engineer
Required CredentialsBachelor's or Master's in Electronics/Embedded Systems, relevant certificationsBachelor's in Electronics/Embedded Systems, entry-level certifications
Work EnvironmentDesign teams, manufacturing facilities, R&D labsDesign teams, manufacturing facilities
Employer & Industry UsageSemiconductor, electronics manufacturing, automotiveSemiconductor, electronics manufacturing
Common Search & ComparisonYesYes

The main difference between a Senior Dft Engineer and a Dft Engineer lies in experience, responsibilities, and expertise. Senior Dft Engineers typically have more years of experience, lead complex DFT (Design for Test) projects, and mentor junior staff. Dft Engineers are often entry to mid-level professionals focused on executing DFT tasks under supervision. Both roles are vital in electronics manufacturing, but the senior position involves greater leadership and strategic planning.

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Infographic showing various Senior Dft Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $126,557 per year, or $60.8 per hour.

Senior DfT Engineer

NXP Semiconductors

Chandler, AZ โ€ข On-site

$120 - $160/hr

Other

Re-posted 5 days ago


Job description

## Senior DfT EngineerApplylocations: Chandler (Office)time type: Full timeposted on: Posted Todayjob requisition id: R-10064841As a DfT engineer, you will join a highly experienced team. Your key responsibilities will be:1) Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product Engineer, Quality Engineer, Validation Engineer โ€“ to identify the superset of requirements for Testability of the chip (Functional mode, Debug mode, ATPG).2) Gain deep understanding on existing and innovative ways to insert DfT for complex analog and mixed-signal IPs, standard Macros (RAM, ROM, NVM, ADC, DAC) and complex digital logic.3) High-quality of RTL design using Verilog and System-Verilog4) Define Verification Plan for the implemented features and write tests, debug and get those passing at Chiptop level DV environment5) Scan insertion, optimization, length balancing, P&R-aware rerouting of chains, Test-Point insertion, ATPG patterns generation, simulation and debug6) Support Test Engineers during debug of patterns on new silicon, and on customer returns7) Participate in Design & Test Review meetings and support the team for DfT 8) Generate comprehensive DfT Architecture & Design documentation and maintain it to match later updates9) Troubleshoot and resolve issues related to DfT throughout the development lifecycle 10) Stay updated with the latest industry trends, tools, and methodologies in DfT design**Job Qualification:*** Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL coding, DfT, Computer Architecture, Digital Verification.* Minimum 3 years of experience in similar role of DfT, Digital Design & Architecture. Seeking 3-8 years total experience for this role* Willing to relocate to Phoenix Metro area (Arizona) and minimum 3 days per week full-day presence in NXP's Chandler office* Excellent on problem-solving, teamwork, planning, organizing, attention to detail and communication skills.More information about NXP in the United States...NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #J-18808-Ljbffr