1

Dft Engineer Jobs (NOW HIRING)

DFT Engineer

Austin, TX ยท On-site

As a DFT Engineer you will work closely with all other design teams - backend, verification and analog, fully responsible for defining, implementing, and deploying advanced design-for-test (DFT ...

DFT Engineer Location:Santa Clara CA Duration:Long term Experience:8-15 Years Role Purpose We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key ...

Job Title: DFT Engineer Location: Santa Clara, CA Role Purpose: We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key Responsibilities: * Work on Scan ...

Hello, My name is Bipasa, and I'm reaching out from Intellectt Inc. regarding an exciting contract opportunity for a DFT Engineer based in Santa Clara, California with one of our prestigious clients.

New

DFT Engineer

Plano, TX ยท Remote

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ...

DFT Engineer

Mountain View, CA ยท On-site

$100K - $180K/yr

DFT Engineer City: Mountain View State/Province: California Posting Start Date: 6/18/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company ...

DFT Engineer Location: Santa Clara, CA Required Skills & Qualifications โ€ข 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs โ€ข Strong understanding of DFT fundamentals ...

DFT Engineer

Santa Clara, UT ยท On-site

$100K - $180K/yr

DFT Engineer City: Santa Clara State/Province: California Posting Start Date: 5/20/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company ...

DFT Engineer

Santa Clara, UT ยท On-site

$60K - $148K/yr

DFT Engineer City: Santa Clara State/Province: California Posting Start Date: 5/20/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company ...

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ...

DFT Engineer

Mountain View, CA ยท On-site

$45K - $121K/yr

DFT Engineer City: Mountain View State/Province: California Posting Start Date: 6/18/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company ...

Senior DFT Engineer [ATPG , MBIST, IO Test, Clock Verification] Location: Santa Clara, CA We are seeking an experienced Senior DFT / ATPG Engineer to support NVIDIA's high performance GPU and SoC ...

Role Description Sivaltech is seeking a highly skilled and experienced Senior DFT Engineer for a full-time, on-site position in the San Francisco Bay Area. In this role, you will be responsible for ...

DFT Engineer You will join a team working on leading-edge projects in the Business Unit (BU) MCU & MPU Engineering & Design Enablement (MMEDE). MMEDE BU brings the technology and ecosystem ...

The DFT Engineer delivers hands-on expertise in designing and deploying advanced Design-for-Test solutions for semiconductor chip development. This role drives robust DFT architectures-including ATPG ...

Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Type :- */W2 Experience 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are ...

next page

Showing results 1-20

Dft Engineer information

See salary details

$73K

$129.5K

$249K

How much do dft engineer jobs pay per year?

As of Jul 4, 2026, the average yearly pay for dft engineer in the United States is $129,511.00, according to ZipRecruiter salary data. Most workers in this role earn between $103,000.00 and $134,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a DFT Engineer, and why are they important?

To thrive as a DFT (Design for Test) Engineer, you need a solid background in electrical engineering, digital design, and ASIC/FPGA development, often supported by a relevant degree. Familiarity with test methodologies, scan insertion tools (such as Synopsys DFT Compiler or Mentor Tessent), and scripting languages like Perl or Python is typically required. Strong problem-solving skills, attention to detail, and effective communication help DFT Engineers collaborate with design and verification teams to resolve complex testability challenges. These competencies are essential to ensure high-quality, testable silicon designs that minimize defects and streamline manufacturing processes.

What is the difference between Dft Engineer vs Test Engineer?

AspectDft EngineerTest Engineer
Required CredentialsBachelor's in Electronics, Electrical, or related fields; certifications in DFT techniquesBachelor's in Electronics, Electrical, Computer Science; certifications in testing methodologies
Work EnvironmentDesign and implementation of DFT strategies during IC developmentTesting, validation, and debugging of electronic products and systems
Employer & Industry UsageSemiconductor companies, IC design firmsConsumer electronics, automotive, telecommunications industries

While both Dft Engineers and Test Engineers work in electronics and semiconductor industries, Dft Engineers focus on designing testability features during chip development, whereas Test Engineers execute testing and validation of finished products. Their roles complement each other, but their daily tasks and expertise areas differ significantly.

Is DFT engineering a good career?

DFT (Design for Test) engineering is a specialized field within semiconductor and integrated circuit design, focusing on ensuring manufacturability and testability of chips. It offers steady demand due to the ongoing need for quality and reliability in electronics, and requires skills in digital design, verification, and tools like EDA software. Career growth depends on industry trends and technical expertise, often involving certifications and continuous learning.

What engineers make $500,000?

Senior engineers in specialized fields such as petroleum, aerospace, or software engineering with extensive experience and advanced skills can earn $500,000 or more annually. High compensation often involves leadership roles, bonuses, stock options, or working in high-demand industries with complex projects.

How much do DFT engineers make?

Design for Test (DFT) engineers typically earn between $80,000 and $130,000 annually, depending on experience, location, and industry. Senior DFT engineers with specialized skills in automation and verification can earn higher salaries, often exceeding $150,000. Compensation may also include bonuses and benefits related to their expertise in integrated circuit testing and design validation.

What does a DFT engineer do?

A DFT (Design for Test) engineer designs and implements test strategies and methodologies to ensure integrated circuits and electronic devices are functional and defect-free. They develop test plans, create test patterns, and work with CAD tools to improve test coverage and manufacturability, often collaborating with design and manufacturing teams. Proficiency in scripting, testing tools, and industry standards is essential for this role.

What are some common challenges faced by DFT Engineers during the silicon validation phase, and how can these be addressed?

DFT Engineers often encounter challenges during the silicon validation phase, such as discrepancies between simulation results and actual silicon behavior, limited access to internal nodes, and diagnosing scan chain failures. These issues can be addressed by thorough pre-silicon verification, incorporating robust test points, and leveraging advanced diagnostic tools and methodologies. Effective collaboration with design and validation teams is also crucial to quickly resolve issues and implement necessary design changes, ensuring high test coverage and product reliability.

What are DFT Engineers?

DFT Engineers, or Design for Test Engineers, are professionals who specialize in designing and implementing test structures and methodologies within integrated circuits (ICs) to ensure their testability and reliability during manufacturing. Their work enables efficient detection and diagnosis of faults in chips, helping to improve yield and reduce production costs. DFT Engineers collaborate closely with design, verification, and manufacturing teams to integrate features such as scan chains, built-in self-test (BIST), and boundary scan into chip designs. Their expertise is crucial for modern semiconductor development, especially as chips become increasingly complex.
More about Dft Engineer jobs
What cities are hiring for Dft Engineer jobs? Cities with the most Dft Engineer job openings:
What are the most commonly searched types of Dft Engineer jobs? The most popular types of Dft Engineer jobs are:
What states have the most Dft Engineer jobs? States with the most job openings for Dft Engineer jobs include:
What job categories do people searching Dft Engineer jobs look for? The top searched job categories for Dft Engineer jobs are:

DFT Engineer

Retym

Austin, TX โ€ข On-site

Full-time

Posted 15 days ago


Job description

Description
For an exciting well funded start-up we are looking for a DFT Engineer.
As a DFT Engineer you will work closely with all other design teams - backend, verification and analog, fully responsible for defining, implementing, and deploying advanced design-for-test (DFT) methodologies for highly complex digital and mixed-signal chips. You will work on silicon test strategies, DFT/DFD, BIST for complex next generation SoCs.
Requirements
Minimum qualifications:
  • 5+ Experience in DFT specification definition, architecture, insertion, and analysis in designs
  • Experience in silicon bring-up, debug, and validation of DFT features on ATE, debugging ATPG patterns, Compressed ATPG patterns, MBIST, and JTAG-related issues
  • Experience in fault modeling

Preferred qualifications:
  • Master's degree in Electrical Engineering.
  • Experience in IP integration (memories, Test controllers, TAP, MBIST).
  • Experience using EDA Test tools like Design/Fusion Compiler, DFT Max, SpyGlass, Modus, Tessent, and TestKompress.
  • Experience and understanding of ASIC DFT, synthesis, simulation and verification flow.
  • Excellent attention to detail organizational, problem-solving, and communication skills.

Responsibilities:
  • Implement SoC DFT strategy and architecture (ATPG/DFT/MBIST)
  • Work on hierarchical design
  • Debug all Design Rule checks, apply design fixes to achieve high test quality
  • Insert all DFT logic - boundary scan, scan chains, DFT Compression, Logic BIST, TAP controller, Clock Control block, and other DFT IP blocks.
  • Insert and hook up MBIST logic.
  • Work on test plan for special analog IPs and implement.
  • Document DFT working processes.