DFT Engineer
Mountain View, CA ยท On-site
DFT Engineer (Scan / MBIST / ATPG) Location: Mountain View CA DFT Engineer (Scan / MBIST / ATPG) We are seeking a DFT Engineer with hands-on experience in Scan, MBIST, ATPG generation, and pattern ...
Mountain View, CA ยท On-site
DFT Engineer (Scan / MBIST / ATPG) Location: Mountain View CA DFT Engineer (Scan / MBIST / ATPG) We are seeking a DFT Engineer with hands-on experience in Scan, MBIST, ATPG generation, and pattern ...
Mountain View, CA ยท On-site
DFT Engineer (Scan / MBIST / ATPG) Location: Mountain View CA DFT Engineer (Scan / MBIST / ATPG) We are seeking a DFT Engineer with hands-on experience in Scan, MBIST, ATPG generation, and pattern ...
Santa Clarita, CA ยท On-site
Hello, My name is Bipasa, and I'm reaching out from Intellectt Inc. regarding an exciting contract opportunity for a DFT Engineer based in Santa Clara, California with one of our prestigious clients.
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Santa Clarita, CA ยท On-site
Hello, My name is Bipasa, and I'm reaching out from Intellectt Inc. regarding an exciting contract opportunity for a DFT Engineer based in Santa Clara, California with one of our prestigious clients.
Santa Clara, CA ยท On-site
DFT Engineer Location:Santa Clara CA Duration:Long term Experience:8-15 Years Role Purpose We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key ...
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Santa Clara, CA ยท On-site
DFT Engineer Location:Santa Clara CA Duration:Long term Experience:8-15 Years Role Purpose We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key ...
San Jose, CA ยท On-site
Principal DFT Engineer-San Jose,CA We are hiring for a Principal DFT Engineer with strong Siemens Tessent experience for onsite opportunity in San Jose, CA. Key DFT Responsibilities & Skills: * Tool ...
San Jose, CA ยท On-site
Principal DFT Engineer-San Jose,CA We are hiring for a Principal DFT Engineer with strong Siemens Tessent experience for onsite opportunity in San Jose, CA. Key DFT Responsibilities & Skills: * Tool ...
Santa Clara, CA ยท On-site
DFT Engineer Location: Santa Clara, CA Required Skills & Qualifications โข 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs โข Strong understanding of DFT fundamentals ...
Santa Clara, CA ยท On-site
DFT Engineer Location: Santa Clara, CA Required Skills & Qualifications โข 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs โข Strong understanding of DFT fundamentals ...
San Jose, CA ยท On-site
$144K - $191K/yr
DFT Engineer San Jose, CA, San Diego, CA, Irvine, CA, Chandler, AZ Required Skills: * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or ...
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San Jose, CA ยท On-site
$144K - $191K/yr
DFT Engineer San Jose, CA, San Diego, CA, Irvine, CA, Chandler, AZ Required Skills: * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or ...
Santa Clara, CA ยท On-site
Design for Test (DFT) Engineer Location: Hybrid (Travel to Santa Clara) Duration: 1year Key Skills & Experience * 3+ years of experience working as a DFT Engineer. * Hands-on experience with the ...
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Santa Clara, CA ยท On-site
Design for Test (DFT) Engineer Location: Hybrid (Travel to Santa Clara) Duration: 1year Key Skills & Experience * 3+ years of experience working as a DFT Engineer. * Hands-on experience with the ...
Santa Clara, CA ยท On-site
$65 - $130/hr
Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...
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Santa Clara, CA ยท On-site
$65 - $130/hr
Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...
Santa Clara, CA ยท On-site
DFT engineer Location: Santa Clara, CA Duration: Long Term ATPG experience is not mandatory for candidates to submit going forward. More DFx and other DFT skills are required. Job details ...
Santa Clara, CA ยท On-site
DFT engineer Location: Santa Clara, CA Duration: Long Term ATPG experience is not mandatory for candidates to submit going forward. More DFx and other DFT skills are required. Job details ...
Santa Clara, CA ยท On-site
$65 - $130/hr
Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...
Santa Clara, CA ยท On-site
$65 - $130/hr
Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...
Santa Clara, CA ยท On-site
Senior DFT Engineer [ATPG , MBIST, IO Test, Clock Verification] Location: Santa Clara, CA We are seeking an experienced Senior DFT / ATPG Engineer to support NVIDIA's high performance GPU and SoC ...
Santa Clara, CA ยท On-site
Senior DFT Engineer [ATPG , MBIST, IO Test, Clock Verification] Location: Santa Clara, CA We are seeking an experienced Senior DFT / ATPG Engineer to support NVIDIA's high performance GPU and SoC ...
San Jose, CA ยท On-site
Title - Lead ASIC DFT Engineer Location - San Jose, CA - Open for Onsite/Remote (Should be in PST timings though) Visa- USC/GC Experience : 10+ years of hands-on experience in ASIC Design-for-Test ...
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San Jose, CA ยท On-site
Title - Lead ASIC DFT Engineer Location - San Jose, CA - Open for Onsite/Remote (Should be in PST timings though) Visa- USC/GC Experience : 10+ years of hands-on experience in ASIC Design-for-Test ...
Irvine, CA ยท On-site
Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation. * Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and ...
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Irvine, CA ยท On-site
Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation. * Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and ...
San Jose, CA ยท On-site
Role: Lead ASIC DFT Engineer Location: Remote Experience 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ASIC DFT Engineer to ...
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San Jose, CA ยท On-site
Role: Lead ASIC DFT Engineer Location: Remote Experience 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ASIC DFT Engineer to ...
We are seeking an experienced DFT Engineer to join a high-performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing Design-for-Test (DFT) solutions ...
We are seeking an experienced DFT Engineer to join a high-performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing Design-for-Test (DFT) solutions ...
Design for Test (DFT) Engineer Location: Hybrid (Travel to Santa Clara) Duration: 1year Key Skills & Experience * 3+ years of experience working as a DFT Engineer. * Hands-on experience with the ...
Design for Test (DFT) Engineer Location: Hybrid (Travel to Santa Clara) Duration: 1year Key Skills & Experience * 3+ years of experience working as a DFT Engineer. * Hands-on experience with the ...
San Jose, CA ยท On-site
$194K/yr
Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote however once/month in office. PST time zone preferred Designation: Associate Experience Required: * 10+ years of hands-on ...
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San Jose, CA ยท On-site
$194K/yr
Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote however once/month in office. PST time zone preferred Designation: Associate Experience Required: * 10+ years of hands-on ...
Irvine, CA ยท On-site
DFT Engineer Responsibilities * Define & document DFT requirements/Specifications for IP/Block and Chip level * Execute DFT Lint to identify scan DRC violations and resolution * Top level and hard ...
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Irvine, CA ยท On-site
DFT Engineer Responsibilities * Define & document DFT requirements/Specifications for IP/Block and Chip level * Execute DFT Lint to identify scan DRC violations and resolution * Top level and hard ...
San Jose, CA ยท On-site
Title - Lead ASIC DFT Engineer Location - San Jose, CA. Visa- USC/GC Experience: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ...
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San Jose, CA ยท On-site
Title - Lead ASIC DFT Engineer Location - San Jose, CA. Visa- USC/GC Experience: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ...
Santa Clara, CA ยท On-site
What You Can Expect We are looking for a Senior Staff DFT Engineer with hands-on experience in scan-based DFT implementation, including Scan Streaming Network (SSN) and IJTAG (IEEE 1687). This role ...
Santa Clara, CA ยท On-site
What You Can Expect We are looking for a Senior Staff DFT Engineer with hands-on experience in scan-based DFT implementation, including Scan Streaming Network (SSN) and IJTAG (IEEE 1687). This role ...
$72K - $87.8K
10% of jobs
$100.6K is the 25th percentile. Wages below this are outliers.
$87.8K - $103.6K
19% of jobs
$103.6K - $119.4K
17% of jobs
The median wage is $121.1K / yr.
$119.4K - $135.2K
39% of jobs
$135.2K - $151K
12% of jobs
$151K - $166.8K
1% of jobs
$166.8K - $182.6K
1% of jobs
$182.6K - $198.4K
1% of jobs
$198.4K - $214.2K
0% of jobs
$214.2K - $229.9K
0% of jobs
$229.9K - $245.7K
0% of jobs
$72K
$127.8K
$245.7K
| Aspect | Dft Engineer | Test Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electronics, Electrical, or related fields; certifications in DFT techniques | Bachelor's in Electronics, Electrical, Computer Science; certifications in testing methodologies |
| Work Environment | Design and implementation of DFT strategies during IC development | Testing, validation, and debugging of electronic products and systems |
| Employer & Industry Usage | Semiconductor companies, IC design firms | Consumer electronics, automotive, telecommunications industries |
While both Dft Engineers and Test Engineers work in electronics and semiconductor industries, Dft Engineers focus on designing testability features during chip development, whereas Test Engineers execute testing and validation of finished products. Their roles complement each other, but their daily tasks and expertise areas differ significantly.

Hi,
Job Title : DFT Engineer (Scan / MBIST / ATPG)
Location: Mountain View CA
DFT Engineer (Scan / MBIST / ATPG)
We are seeking a DFT Engineer with hands-on experience in Scan, MBIST, ATPG generation, and pattern simulation for complex SoC/IP designs.
Thanks and Regards,
Praveenkumar
Sourced by ZipRecruiter
51 - 200 Employees
Charlotte, NC, US
2004