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Dft Engineer Jobs in California (NOW HIRING)

Siri InfoSolutions Inc

Sr. DFT Engineer (Remote)

San Jose, CA · On-site

$122K - $168K/yr

Role: Sr. DFT Engineer Location: San Jose, CA-Remote Experience: 5+ Years Seeking Candidate Exposure with ATGP and SSM / SSN (Streaming Scan Network) developed by Siemens (Tessent) which Decouples ...

Medium

Senior DFT Engineer

Saratoga, CA · On-site

$120 - $220/hr

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

Nokia

Principal SoC DFT Engineer

San Jose, CA · On-site

$159K - $296K/yr

The Principal DFT Engineer will work on cutting-edge ASIC implementation for the Network Infrastructure Optical Network group Responsibilities You will be working on DFT architecture and ...

Nokia

Principal SoC DFT Engineer

San Jose, CA

The Principal DFT Engineer will work on cutting-edge ASIC implementation for the Network Infrastructure Optical Network group You Have: * Bachelor's degree in computer science, Electrical Engineering ...

Cisco

ASIC DFT Engineer

San Jose, CA

$165K - $241K/yr

You will be in the Silicon One development organization as an ASIC DFT Engineer . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT ...

Cisco

ASIC DFT Engineer

San Jose, CA · On-site

$165K - $241K/yr

You will be in the Silicon One development organization as an ASIC DFT Engineer . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT ...

Socket.dev

SoC DFT Engineer, Cloud

Sunnyvale, CA · On-site

$163 - $236/hr

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. * 5 years of experience in DFT architecture ...

New

E-Space

Senior DFT Engineer

Saratoga, CA · On-site

$120K - $220K/yr

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

SpaceX

Sr. ASIC DFT Engineer (Silicon)

Irvine, CA · On-site

$165K - $260K/yr

Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're ...

E-Space

Senior DFT Engineer

Saratoga, CA · On-site

$120K - $220K/yr

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

E-Space

Senior DFT Engineer

Saratoga, CA

$120K - $220K/yr

We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT strategies across complex ...

Nvidia

Senior DFT Engineer

Santa Clara, CA

$122K - $168K/yr

At NVIDIA, our Senior DFT Engineers lead the way in silicon test innovation, ensuring flawless execution and outstanding quality in our next-generation silicon platforms. This is an outstanding ...

Cisco

ASIC DFT Engineer

San Jose, CA · On-site

$152K - $219K/yr

Prior experience working in the latest innovative trends in DFT, test and silicon engineering. * Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary ...

Qualcomm

CPU DFT Engineer

Santa Clara, CA · On-site

$142K - $213K/yr

As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and test ...

SpaceX

Sr. ASIC DFT Engineer (Silicon)

Palo Alto, CA · On-site

$175K - $280K/yr

SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

SpaceX

Sr. ASIC DFT Engineer (Silicon)

Irvine, CA

$165K - $260K/yr

SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

SpaceX

Sr. ASIC DFT Engineer (Silicon)

Irvine, CA · On-site

$165K - $260K/yr

Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're ...

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Showing results 21-40

All JobsDft Engineer JobsDft Engineer Jobs in California

Dft Engineer information

See California salary details

$72K

$127.8K

$245.7K

How much do dft engineer jobs pay per year?

As of Aug 21, 2026, the average yearly pay for dft engineer in California is $127,815.00, according to ZipRecruiter salary data. Most workers in this role earn between $101,700.00 and $132,700.00 per year, depending on experience, location, and employer.

What is a DFT engineer?

DFT Engineers, or Design for Test Engineers, are professionals who specialize in designing and implementing test structures and methodologies within integrated circuits (ICs) to ensure their testability and reliability during manufacturing. Their work enables efficient detection and diagnosis of faults in chips, helping to improve yield and reduce production costs. DFT Engineers collaborate closely with design, verification, and manufacturing teams to integrate features such as scan chains, built-in self-test (BIST), and boundary scan into chip designs. Their expertise is crucial for modern semiconductor development, especially as chips become increasingly complex.

What are the key skills and qualifications needed to thrive as a DFT engineer?

To thrive as a DFT (Design for Test) Engineer, you need a solid background in electrical engineering, digital design, and ASIC/FPGA development, often supported by a relevant degree. Familiarity with test methodologies, scan insertion tools (such as Synopsys DFT Compiler or Mentor Tessent), and scripting languages like Perl or Python is typically required. Strong problem-solving skills, attention to detail, and effective communication help DFT Engineers collaborate with design and verification teams to resolve complex testability challenges. These competencies are essential to ensure high-quality, testable silicon designs that minimize defects and streamline manufacturing processes.

What are some common challenges faced by DFT engineers during the silicon validation phase, and how can these be addressed?

DFT Engineers often encounter challenges during the silicon validation phase, such as discrepancies between simulation results and actual silicon behavior, limited access to internal nodes, and diagnosing scan chain failures. These issues can be addressed by thorough pre-silicon verification, incorporating robust test points, and leveraging advanced diagnostic tools and methodologies. Effective collaboration with design and validation teams is also crucial to quickly resolve issues and implement necessary design changes, ensuring high test coverage and product reliability.

What is the difference between Dft Engineer vs Test Engineer?

AspectDft EngineerTest Engineer
Required CredentialsBachelor's in Electronics, Electrical, or related fields; certifications in DFT techniquesBachelor's in Electronics, Electrical, Computer Science; certifications in testing methodologies
Work EnvironmentDesign and implementation of DFT strategies during IC developmentTesting, validation, and debugging of electronic products and systems
Employer & Industry UsageSemiconductor companies, IC design firmsConsumer electronics, automotive, telecommunications industries

While both Dft Engineers and Test Engineers work in electronics and semiconductor industries, Dft Engineers focus on designing testability features during chip development, whereas Test Engineers execute testing and validation of finished products. Their roles complement each other, but their daily tasks and expertise areas differ significantly.

Is DFT engineering in demand?

DFT (Design for Test) engineering is in demand within the semiconductor and integrated circuit industries, as companies seek to improve chip testability and reduce manufacturing costs. Skills in digital design, verification, and familiarity with EDA tools are valuable, and demand is driven by ongoing advancements in electronics and increasing complexity of chips.

What are the most commonly searched types of Dft Engineer jobs in California?

The most popular types of Dft Engineer jobs in California are:

What are popular job titles related to Dft Engineer jobs in California?

For Dft Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Dft Engineer jobs in California look for?

The top searched job categories for Dft Engineer jobs in California are:

What cities in California are hiring for Dft Engineer jobs?

Cities in California with the most Dft Engineer job openings:

Dft Engineer jobs near you
Infographic showing various Dft Engineer job openings in California as of August 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution, with an average salary of $127,815 per year, or $61.4 per hour.

DFT Engineers

Comprehensive Resources Inc.

Santa Clara, CA • On-site

Other

This job post has expired today. Applications are no longer accepted.

Job description

Job Title: DFT Engineer

Location: Santa Clara, California.

Client has relaxed the JD, and ATPG experience is not mandatory for candidates to submit going forward.

More of the DFx skills and other DFT skills are required.

Job details:-

  • Familiarity with the Siemens suite of DFT tools
  • DFT insertion for SCAN (with SSN) and MBIST
  • MBIST Repair Implementation and Verification
  • Generating collaterals for Test Timing and Place and Route
  • Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec
  • Verification of DFT features, including

  • Boundary Scan
  • JTAG
  • SCAN
  • MBIST
  • High Speed IO

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