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Remote Physical Verification Engineer Jobs (NOW HIRING)

You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 10+ years of experience in ASIC/SoC verification. * Solid ...

SOC Verification

New Marlborough, MA ยท Remote

$139K/yr

Remote 1. General verification expertise - * System Verilog * UVM working experience (In the ... Check that engineer has done reasonable amount of debug in past projects * Has logical and ...

ASIC & FPGA Design Engineer Stf

Orlando, FL ยท On-site +1

$114K - $158K/yr

... physical verification closure across multiple foundries, directly supporting mission critical ... This position is remote. MUST BE A U.S. CITIZEN - This position is located at a facility that ...

Compute Verification Lead

Mountain View, CA ยท On-site +1

$175K - $450K/yr

MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

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Remote Physical Verification Engineer information

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$80K

$142.6K

$203.5K

How much do remote physical verification engineer jobs pay per year?

As of Jul 1, 2026, the average yearly pay for remote physical verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

How does a Remote Physical Verification Engineer typically collaborate with design and layout teams to resolve verification issues?

As a Remote Physical Verification Engineer, collaboration with design and layout teams is essential for resolving verification issues efficiently. Communication is often handled through video meetings, project management tools, and shared documentation platforms. You'll review error reports, discuss potential fixes, and provide guidance on design rule checks (DRC) and layout versus schematic (LVS) violations. Being proactive in documenting findings and maintaining clear channels with both on-site and remote colleagues helps ensure quick turnaround and high-quality tapeouts.

What is a Remote Physical Verification Engineer?

A Remote Physical Verification Engineer is a professional who specializes in checking the physical layout of integrated circuits (ICs) to ensure they meet design and manufacturing specifications. Working remotely, these engineers use specialized electronic design automation (EDA) tools to verify aspects such as design rule checks (DRC) and layout versus schematic (LVS) compliance. They collaborate with design teams to identify and resolve potential issues before fabrication, helping to prevent costly errors and delays. This role requires strong knowledge of semiconductor design, EDA software, and remote collaboration skills.

What are the key skills and qualifications needed to thrive as a Remote Physical Verification Engineer, and why are they important?

To thrive as a Remote Physical Verification Engineer, you need a strong background in electrical engineering, solid understanding of VLSI design, and hands-on experience with semiconductor physical verification processes. Expertise in using EDA tools like Cadence, Synopsys, or Mentor Graphics, and familiarity with DRC/LVS checks and scripting languages such as Python or TCL, are typically required. Exceptional problem-solving, attention to detail, and effective remote communication skills help you collaborate efficiently with distributed teams. These skills and qualities are crucial to ensuring chip designs meet all physical and manufacturing requirements, minimizing costly errors and delays.

What is the difference between Remote Physical Verification Engineer vs Physical Verification Engineer?

AspectRemote Physical Verification EngineerPhysical Verification Engineer
CredentialsTypically requires VLSI design, verification certifications, and familiarity with EDA toolsSimilar credentials, often with additional emphasis on physical design tools
Work EnvironmentPrimarily remote, collaborating via online toolsUsually onsite or hybrid, depending on company policy
Industry UsageUsed in semiconductor and chip design companies, especially in remote teamsCommon in semiconductor industry, both onsite and remote roles
Search & Comparison IntentOften searched by candidates looking for remote roles in physical verificationMore general, includes onsite roles

The Remote Physical Verification Engineer and Physical Verification Engineer roles share similar credentials and industry usage. The key difference lies in the work environment, with the remote role allowing work from anywhere, while the onsite role may require physical presence. Both positions are vital in semiconductor design, with remote options increasing flexibility for professionals in the field.

More about Remote Physical Verification Engineer jobs
What cities are hiring for Remote Physical Verification Engineer jobs? Cities with the most Remote Physical Verification Engineer job openings:
What are the most commonly searched types of Physical Verification Engineer jobs? The most popular types of Physical Verification Engineer jobs are:
What states have the most Remote Physical Verification Engineer jobs? States with the most job openings for Remote Physical Verification Engineer jobs include:
Senior ASIC Design Verification Engineer

Senior ASIC Design Verification Engineer

Ethernovia, Inc.

OR โ€ข Remote

$200K - $300K/yr

Other

Medical, Dental, Vision

Posted 26 days ago


Job description

Senior ASIC Design Verification Engineer

Summary: ย 

  • As a Senior ASIC Design Verification Engineer, you will be responsible for all aspects of digital SoC verification.
  • You will work the architects, designers, and SW engineers to plan and execute verification and validation of advanced automotive communication semiconductors and systems.
  • You will contribute to a positive, trusting, and cohesive working environment based on integrity and strong work ethics.
  • This position is located in:ย United Statesย - Remote

Key Qualifications:

  • BS and/or MS in Electrical Engineering, Computer Science, or related field
  • Minimum 10+ years of ASIC verification experience
  • Strong understanding of ASIC verification fundamentals and industry standard methodologies
  • Experience with Verilog/System Verilog, UVM, Python, TCL, C/C++
  • Experience with the full verification flow, from spec to coverage analysis to gate level sim
  • Debugging failures in simulation to root cause problems
  • Self-motivated and able to work effectively both independently and in a team

Additional Success Factors:
Experience in any of the following areas:

  • Networking (Ethernet MAC, PHY, Switching, TCP/IP, security, PCIe and other industry standard protocols)
  • Video standards, protocols, processing
  • Digital signal processing filters
  • Third party IP (SerDes, controllers, processors, etc.)
  • Modular and Reusable Testbench architecture
  • Design for re-use of pre and post silicon tests and infrastructure
  • Automation of testbench creation, tests, regression, or EDA tools
  • Knowledge of SystemC and/or DPI

Personal Skills:

  • Excellent communication/documentation skills.
  • Attention to details.
  • Collaboration across multidisciplinary and international teams.

What You Can Expect from Ethernovia:

  • Technology depth and breadth expansion that can't be found in a large company
  • Opportunity to grow your career as the company grows
  • Pre IPO stock options
  • Cutting edge technology
  • World class team
  • Competitive base salary
  • Flexible hours
  • Medical, dental and vision insurance for employees

Salary Range:

  • The actual offered base salary for U.S. locations will vary depending on factors such as work location, individual qualifications, specializations, experience, skills, job-related knowledge, and internal equity. The annual salary range for this position is $200,000 - $300,000. The compensation package will also include incentive compensation in the form of pre-IPO ISO options, in addition to base salary and a full range of medical and other benefits.

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