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Remote Physical Verification Engineer Jobs in Minnesota

Senior Staff Design Automation Engineer

Minneapolis, MN ยท On-site +1

$108K - $142K/yr

The position is based at our HQ site in Bloomington, MN, with consideration available for remote ... Lead physical verification and tape-in reviews Required Qualifications: * 5+ years of experience ...

New

This engineer will be a significant contributor to a broad array of design projects supporting ... Lead physical verification and tape-in reviews Required Qualifications: * Expert in custom layout ...

Senior Substation Physical Engineer

Minneapolis, MN ยท On-site +1

$109K - $149K/yr

Remote Only: * Fully Remote! - Work from where you are! * Candidates must located in the Denver, CO ... Create and verify bills of materials for substation physical components, ensuring precision and ...

Eden Prairie, MN | Hybrid | Remote Schedule: Full-Time Salary: $85,000 - $120,000 (based on experience) EVS is seeking a Substation Physical Design Engineer to support the design and delivery of ...

... remote and high-dependency aviation environments. These efforts focus on delivering mission ... Experience supporting verification and validation activities in regulated environments

... remote locations will be considered. Scope & Responsibilities * Manage multiple, diverse energy and ... Execute testing protocols to verify the operating energy performance of building systems as part of ...

Senior Systems Engineer

Eagan, MN ยท Remote

$106K - $145K/yr

... remote and high-dependency aviation environments. These efforts focus on delivering mission ... Experience supporting verification and validation activities in regulated environments

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Remote Physical Verification Engineer information

What is a remote physical verification engineer?

A Remote Physical Verification Engineer is a professional who specializes in checking the physical layout of integrated circuits (ICs) to ensure they meet design and manufacturing specifications. Working remotely, these engineers use specialized electronic design automation (EDA) tools to verify aspects such as design rule checks (DRC) and layout versus schematic (LVS) compliance. They collaborate with design teams to identify and resolve potential issues before fabrication, helping to prevent costly errors and delays. This role requires strong knowledge of semiconductor design, EDA software, and remote collaboration skills.

How does a remote physical verification engineer typically collaborate with design and layout teams to resolve verification issues?

As a Remote Physical Verification Engineer, collaboration with design and layout teams is essential for resolving verification issues efficiently. Communication is often handled through video meetings, project management tools, and shared documentation platforms. You'll review error reports, discuss potential fixes, and provide guidance on design rule checks (DRC) and layout versus schematic (LVS) violations. Being proactive in documenting findings and maintaining clear channels with both on-site and remote colleagues helps ensure quick turnaround and high-quality tapeouts.

What are the key skills and qualifications needed to thrive as a remote physical verification engineer, and why are they important?

To thrive as a Remote Physical Verification Engineer, you need a strong background in electrical engineering, solid understanding of VLSI design, and hands-on experience with semiconductor physical verification processes. Expertise in using EDA tools like Cadence, Synopsys, or Mentor Graphics, and familiarity with DRC/LVS checks and scripting languages such as Python or TCL, are typically required. Exceptional problem-solving, attention to detail, and effective remote communication skills help you collaborate efficiently with distributed teams. These skills and qualities are crucial to ensuring chip designs meet all physical and manufacturing requirements, minimizing costly errors and delays.

What is the difference between Remote Physical Verification Engineer vs Physical Verification Engineer?

AspectRemote Physical Verification EngineerPhysical Verification Engineer
CredentialsTypically requires VLSI design, verification certifications, and familiarity with EDA toolsSimilar credentials, often with additional emphasis on physical design tools
Work EnvironmentPrimarily remote, collaborating via online toolsUsually onsite or hybrid, depending on company policy
Industry UsageUsed in semiconductor and chip design companies, especially in remote teamsCommon in semiconductor industry, both onsite and remote roles
Search & Comparison IntentOften searched by candidates looking for remote roles in physical verificationMore general, includes onsite roles

The Remote Physical Verification Engineer and Physical Verification Engineer roles share similar credentials and industry usage. The key difference lies in the work environment, with the remote role allowing work from anywhere, while the onsite role may require physical presence. Both positions are vital in semiconductor design, with remote options increasing flexibility for professionals in the field.

What job categories do people searching Remote Physical Verification Engineer jobs in Minnesota look for?

The top searched job categories for Remote Physical Verification Engineer jobs in Minnesota are:

What cities in Minnesota are hiring for Remote Physical Verification Engineer jobs?

Cities in Minnesota with the most Remote Physical Verification Engineer job openings:

Infographic showing various Remote Physical Verification Engineer job openings in Minnesota as of June 2026, with employment types broken down into 84% Full Time, 7% Part Time, 2% Temporary, and 7% Contract. Highlights an 100% Remote job distribution.

Senior Staff Design Automation Engineer

skywater

Minneapolis, MN โ€ข On-site, Remote

$108K - $142K/yr

Full-time

Posted 3 days ago

New


Job description

This SkyWater Senior Staff Design Automation Engineerย will primarily lead custom layout and Electronic Design Automation (EDA) activities to provide testchip collateral for semiconductor integrated circuit (IC) technologies. This engineer will be a significant contributor to a broad array of design projects supporting modeling, reliability, and yield as part of Process Design Kit (PDK) development for advanced CMOS or quantum technologies.

The position is based at our HQ site in Bloomington, MN, with consideration available for remote work.

Major Areas of Accountability:

  • Automated or systematic creation or conversion of test structures for eTest, modeling, reliability, yield, and IP test chips as part of new technology development
  • Version control and management of large design libraries with multiple contributors
  • Introduction of both custom and automated designs for layout projects supporting highly diverse technology flows
  • Utilize SkyWater PDKโ€™s and provide feedback to internal teams on issues, improvements, capabilities, etc.
  • Lead physical verification and tape-in reviews

Required Qualifications:

  • 5+ years of experience with AS in Electronic Design fields. 3+ years of experience with BS in Electrical Engineering, Microelectronics or related fields.
  • Proven experience in full-custom layout design, especially for discrete device process-control monitors using EDA tool-assisted design flow such as Cadence and Siemens EDA tool suites, (e.g. Calibre and Virtuoso)
  • Capable to independently execute design automation using tools such as SKILL, Tcl, python or other scripting language
  • Experience in developing and/or using physical verification tools (DRC, ERC, LVS/PEX) and DFM tooling.ย 
  • Experience in large design library change controls.
  • Familiarity with typical mixed-signal IC design and tape-in flow.
  • Clear communicator, concise written report skills, and inventive problem solver
  • U.S. Person Required: This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons.ย ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee.ย 

Preferred Qualifications:

  • Background in PDK development in some or all of the following fields: CMOS, MEMS, photonics, or superconducting.
  • Familiarity with parasitic extraction tools such as Mentor Calibre xRC, Cadence Quantus, or Synopsys StarRC.
  • Experience with data preparation for photo mask design
  • Background in full-custom IC design utilizing hierarchical design priciples and automation including place-and-route
  • Formal training in both (1) electrical engineering or electronic device design, (2) computer science