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Asic Verification Jobs in Minnesota (NOW HIRING)

ASIC Design Verification Engineer

Minneapolis, MN · On-site

$142K - $173K/yr

As a technical member of Micron's ASIC Design Verification team, you will have a key role in development of advanced verification components for sophisticated SOC designs, while ensuring on time ...

Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments * Determines ...

Sr. Design Verification Engineer

Minneapolis, MN · On-site

$142K - $173K/yr

Our ASIC Design Verification team develops robust, scalable verification environments for highly complex designs and partners closely with global design teams to deliver highquality silicon on ...

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Asic Verification information

See Minnesota salary details

$86.2K

$152.9K

$202.7K

How much do asic verification jobs pay per year?

As of Aug 21, 2026, the average yearly pay for asic verification in Minnesota is $152,863.00, according to ZipRecruiter salary data. Most workers in this role earn between $133,200.00 and $171,900.00 per year, depending on experience, location, and employer.

What is ASIC verification?

ASIC verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. It involves using simulation, formal methods, and other verification techniques to catch and correct design errors early, which helps prevent costly mistakes during chip fabrication. Verification engineers create test environments and write testbenches to simulate the ASIC's behavior under different scenarios. This step is critical in the chip design flow, as it directly impacts the quality, reliability, and performance of the final product.

What are the key skills and qualifications needed to thrive as an ASIC verification engineer?

To thrive as an ASIC Verification Engineer, you need a strong background in digital design, verification methodologies, and hardware description languages such as Verilog or VHDL, often supported by a degree in electrical engineering or a related field. Familiarity with industry-standard verification tools like UVM, SystemVerilog, and simulation or formal verification environments is typically expected. Analytical thinking, attention to detail, and effective communication are essential soft skills for diagnosing complex issues and collaborating with design teams. Mastery of these skills ensures high-quality, error-free ASIC designs and efficient project delivery in a highly technical environment.

What are some common challenges faced in ASIC verification, and how can new team members effectively overcome them?

A common challenge in ASIC Verification is ensuring comprehensive test coverage to catch subtle design bugs before production. New team members often need to quickly familiarize themselves with complex verification environments and tools such as UVM, SystemVerilog, and simulation platforms. Collaborating closely with design engineers and participating in regular code and coverage reviews can accelerate learning and help resolve issues efficiently. Seeking mentorship from experienced colleagues and actively engaging in team discussions also aids in navigating verification complexities.

What is the difference between Asic Verification vs FPGA Verification?

AspectAsic VerificationFPGA Verification
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, knowledge of hardware description languages (HDL)Bachelor's/Master's in Electrical Engineering or Computer Engineering, HDL knowledge
Work EnvironmentDesign teams, hardware labs, simulation environmentsPrototyping labs, hardware testing, simulation
Industry UsageSemiconductor companies, chip design firmsPrototyping, FPGA-based product development
Common Search/ComparisonAsic Verification vs FPGA Verification

Asic Verification and FPGA Verification share similar skills, such as HDL knowledge and hardware testing. However, Asic Verification focuses on validating integrated circuit designs before manufacturing, often involving complex simulation and formal verification. FPGA Verification involves testing programmable hardware prototypes, emphasizing rapid prototyping and hardware-in-the-loop testing. Both roles are essential in hardware development but differ in scope, environment, and end goals.

How to become an ASIC verification engineer?

To become an ASIC verification engineer, candidates typically need a bachelor's degree in electrical engineering, computer engineering, or a related field. Gaining experience with hardware description languages like Verilog or VHDL, and verification tools such as UVM or SystemVerilog, is essential. Developing strong problem-solving skills and understanding digital design principles are also important for success in this role.

What does an ASIC verification engineer do?

An ASIC verification engineer designs and executes tests to ensure that application-specific integrated circuits (ASICs) function correctly according to specifications. They develop test plans, write simulation code using hardware description languages like SystemVerilog, and use verification tools to identify and fix design errors before manufacturing. This role requires strong programming skills, knowledge of digital design, and familiarity with verification methodologies such as UVM.

What are the most commonly searched types of Asic Verification jobs in Minnesota?

The most popular types of Asic Verification jobs in Minnesota are:

What are popular job titles related to Asic Verification jobs in Minnesota?

For Asic Verification jobs in Minnesota, the most frequently searched job titles are:

Infographic showing various Asic Verification job openings in Minnesota as of August 2026, with employment types broken down into 1% As Needed, 80% Full Time, 14% Part Time, 3% Contract, and 2% Nights. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution, with an average salary of $152,863 per year, or $73.5 per hour.

Principal ASIC Design Verification Engineer

ForwardEdge ASIC LLC

Saint Paul, MN

$200K - $220K/yr

Other

Medical, Retirement, PTO

Re-posted yesterday


Job description

Position Description: At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable microelectronic solutions designed for performance in commercial, aerospace, defense, and security sectors. FEASIC operates a full-scale ASIC design shop with cross-disciplinary fluency between digital logic, analog/mixed-signal design, and physical layout, and sits at the intersection of advanced ASIC, FPGA, and microelectronics design. As a wholly owned subsidiary of Lockheed Martin, we combine the agility of a startup with the stability and scale of a Fortune 100 leader. We operate in a nimble, fast-paced environment of 80+ highly experienced and specialized engineers with over 25 years of ASIC/FPGA experience and more than 300 patents. We are looking for a Principal ASIC Design Verification Engineer to provide technical leadership across complex digital and mixed-signal verification programs. This role is ideal for a senior verification expert who enjoys owning verification strategy, building scalable environments, solving difficult debug problems, and mentoring high-performing engineering teams.Position SummaryAs a Principal ASIC Design Verification Engineer, you will lead verification planning and execution for complex ASIC, SoC, subsystem, and FPGA designs. You will define verification architecture, develop reusable methodologies, drive coverage closure, and ensure designs meet functional, performance, and quality requirements.You will work closely with architecture, RTL design, analog/mixed-signal, firmware, FPGA, emulation, and program teams to deliver high-quality silicon. In this role, you will serve as both a hands-on technical contributor and a verification leader, helping establish best practices and guiding other engineers through challenging verification efforts.Key Responsibilities• Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA designs.• Define verification architecture, testbench structure, verification plans, coverage models, and signoff criteria.• Develop and maintain scalable verification environments using SystemVerilog, UVM, assertions, constrained-random testing, and directed testing.• Create and review verification plans, functional coverage models, scoreboards, monitors, checkers, sequences, and reusable verification components.• Drive verification closure using functional coverage, code coverage, assertion coverage, regression results, and bug metrics.• Lead debug of complex failures across RTL, testbench, firmware, gate-level simulation, emulation, and system-level environments.• Collaborate closely with architects, RTL designers, analog/mixed-signal engineers, firmware developers, and project leads to ensure complete and efficient verification.• Serve as the verification technical authority in customer architecture and signoff reviews.• Provide effort estimation and verification staffing input for proposals and new program pursuits.• Mentor junior and senior verification engineers through technical reviews, methodology guidance, and hands-on debug support.• Improve verification productivity through automation, scripting, reusable infrastructure, and methodology enhancements.• Evaluate and apply industry-standard tools and methodologies, including simulation, formal verification, emulation, FPGA prototyping, and verification management tools.• Support project planning by estimating verification scope, identifying risks, tracking progress, and communicating status to technical and program leadership.Qualifications• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.• Typically 12+ years of ASIC, SoC, or FPGA design verification experience, with demonstrated ownership of complex verification efforts.• Expert-level experience with SystemVerilog and UVM.• Strong background developing block-level, subsystem-level, or SoC-level verification environments.• Experience creating verification plans, coverage models, constrained-random tests, directed tests, assertions, and regression strategies.• Strong understanding of verification closure, including functional coverage, code coverage, assertion coverage, bug triage, and signoff methodology.• Hands-on debug experience with complex RTL and testbench issues.• Proficiency with scripting and automation using languages such as Python, Perl, Tcl, shell scripting, or Make.• Experience with industry-standard EDA simulation, debug, coverage, and verification management tools.• Strong technical leadership skills, including experience mentoring engineers and guiding verification execution.• Excellent written and verbal communication skills.• Ability to collaborate effectively across architecture, design, verification, analog, firmware, FPGA, and program teams.Preferred Qualifications• Experience with high-speed interfaces and protocols such as PCIe, CXL, DDR, LPDDR, Ethernet, USB, MIPI, AMBA, AXI, CHI, or UCIe.• Experience contributing to proposals, scoping, or technical pre-sales in a design-services context• Experience with formal verification, assertion-based verification, or property checking.• Experience with gate-level simulation, low-power verification, UPF/CPF, reset verification, or X-propagation analysis.• Experience with emulation, FPGA prototyping, hardware/software co-verification, or post-silicon bring-up support.• Familiarity with mixed-signal verification methodologies.• Experience working in customer-facing engineering environments or design services organizations.Why Join ForwardEdge ASIC?At ForwardEdge ASIC, you will work on challenging silicon programs with a highly experienced engineering team. You will have the opportunity to influence verification strategy, contribute to advanced ASIC development, and help deliver high-quality custom silicon solutions for leading-edge applications.What We Offer• Work-Life Balance: Flexible 9/80 work schedule with every other Friday off• Competitive Comp & Benefits: Healthcare and medical coverage options, 401(k) retirement benefits with company contribution, generous holidays and PTO• Incentives: Eligibility for short-term and long-term incentive programsJoin ForwardEdge ASIC and be part of a team that thrives on innovation and excellence in ASIC design. Together, we build the technology that enables a safer, more resilient world. $200,000.00 - $220,000.00 Annually