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Senior Asic Design Engineer Jobs in Minnesota (NOW HIRING)

ASIC Design Verification Engineer

Minneapolis, MN · On-site

$142K - $173K/yr

As a technical member of Micron's ASIC Design Verification team, you will have a key role in ... Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or equivalent. * 2+ ...

Responsible for definition, design, verification and documentation for ASIC (Application Specific ... Regular contact with senior levels of internal work groups * Works under limited direction

Responsible for definition, design, verification and documentation for ASIC (Application Specific ... Regular contact with senior levels of internal work groups * Works under limited direction

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Senior Asic Design Engineer information

See Minnesota salary details

$137.1K

$174K

$215K

How much do senior asic design engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for senior asic design engineer in Minnesota is $173,996.00, according to ZipRecruiter salary data. Most workers in this role earn between $155,700.00 and $191,000.00 per year, depending on experience, location, and employer.

What does a senior ASIC design engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a senior ASIC design engineer?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are some common challenges senior ASIC design engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.
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Infographic showing various Senior Asic Design Engineer job openings in Minnesota as of August 2026, with employment types broken down into 1% Internship, 90% Full Time, 5% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $173,996 per year, or $83.7 per hour.

$140K - $170K/yr

Other

Medical, Retirement, PTO

Re-posted 20 days ago


Job description

Position Description: At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable microelectronic solutions designed for performance in commercial, aerospace, defense, and security sectors. FEASIC operates a full-scale ASIC design shop with cross-disciplinary fluency between digital logic, analog/mixed-signal design, and physical layout, and sits at the intersection of advanced ASIC, FPGA, and microelectronics design. As a wholly owned subsidiary of Lockheed Martin, we combine the agility of a startup with the stability and scale of a Fortune 100 leader. We operate in a nimble, fast-paced environment of 80+ highly experienced and specialized engineers with over 25 years of ASIC/FPGA experience and more than 300 patents. Job SummaryWe are currently seeking a Staff ASIC Design Engineer responsible for developing ASIC and FPGA designs that will be included in an array of complex, innovative and exciting products. Your responsibility will be developing RTL for both ASIC and FPGA design environments. You will collaborate with highly qualified and experienced digital design engineers on the team. You will work closely with verification, analog design, physical design and architecture teams.Key Responsibilities:• Providing leadership to lower-level engineers and working with architects to understand the function and requirements for all types of digital design blocks.• Define, document and design digital/analog interfaces.• Writing detailed implementation plans and specifications for complex design blocks. • Writing Register Transfer Level (RTL) code using industry standard hardware description languages. • Writing lower-level test bench code to verify baseline functionality and features for design blocks.• Writing test plans and coordinating with the Design Verification team to fully verify design blocks.• Synthesizing RTL code using industry standard tools and analyzing results. • Providing RTL updates to meet Power, Performance and Area (PPA) requirements. • Writing and executing plans for the post silicon lab validation. • Providing continued support for design blocks working within a larger system level environment through productization and production. • Process and methodology automation utilizing common scripting languages (i.e. python, perl, tcl). • Provide mentorship and guidance to lower-level digital design engineers. Qualifications:• Bachelor’s or master’s degree in electrical or computer engineering. • Relevant prior experience working at this level as a Staff ASIC Design Engineer. • Experience with RTL coding languages and industry common scripting languages. • Technical leadership experience is a plus. What We Offer• Work-Life Balance: Flexible 9/80 work schedule with every other Friday off• Competitive Comp & Benefits: Healthcare and medical coverage options, 401(k) retirement benefits with company contribution, generous holidays and PTO• Incentives: Eligibility for short-term and long-term incentive programsJoin ForwardEdge ASIC and be part of a team that thrives on innovation and excellence in ASIC design. Together, we build the technology that enables a safer, more resilient world. $140,000.00 - $170,000.00 Annually