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Pcie Verification Engineer Jobs in Minnesota (NOW HIRING)

Senior Electrical Engineer

Eden Prairie, MN · On-site

$109.60K - $142.70K/yr

... verification * Experience working in teams including engineers from multiple engineering ... High-speed digital interfaces such as DDR, PCIe, SATA, etc. * RF communications such as Bluetooth ...

Senior Electrical Engineer

Eden Prairie, MN · On-site

$109.70K - $142.90K/yr

... verification * Experience working in teams including engineers from multiple engineering ... High-speed digital interfaces such as DDR, PCIe, SATA, etc. * RF communications such as Bluetooth ...

Principal Electrical Engineer

Eden Prairie, MN · On-site

$141.70K - $173.30K/yr

Gather technical data and prepare technical documents such as design verification test reports ... Experience with high speed digital interfaces and RF communications, including DDR, PCIe, and SATA ...

Principal Electrical Engineer

Eden Prairie, MN · On-site

$141.70K - $173.30K/yr

... verification * Experience with leading teams including engineers from multiple engineering ... Experience with high-speed digital interfaces such as DDR, PCIe, SATA, etc. preferred * Experience ...

Principal Electrical Engineer

Eden Prairie, MN · On-site

$141.90K - $173.50K/yr

... verification * Experience with leading teams including engineers from multiple engineering ... Experience with high-speed digital interfaces such as DDR, PCIe, SATA, etc. preferred * Experience ...

Design and verification testing to internal and external specifications. * Development of ... Experience with communications interfaces like PCIe, Ethernet, USB, I2C, SPI, or RS-422. * Hands-on ...

Electrical Engineer

Hills, MN · On-site

$85K - $110K/yr

Design and verification testing to internal and external specifications. * Development of ... Experience with communications interfaces like PCIe, Ethernet, USB, I2C, SPI, or RS-422. * Hands-on ...

Electrical Engineer

Minneapolis, MN · On-site

$85K - $110K/yr

Design and verification testing to internal and external specifications. * Development of ... Experience with communications interfaces like PCIe, Ethernet, USB, I2C, SPI, or RS-422. * Hands-on ...

Design, develop and verify Micron's next generation analog and mixed signal integrated circuits as ... 6, ONFi, PCIe, M-PHY, HDMI, USB, or SATA 4. Independent ownership of sub-blocks: PLL, DLL, CDR ...

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Pcie Verification Engineer information

What are the key skills and qualifications needed to thrive as a PCIe Verification Engineer, and why are they important?

To thrive as a PCIe Verification Engineer, you need a strong background in digital design, computer architecture, and verification methodologies, typically backed by a degree in electrical or computer engineering. Proficiency with hardware description languages (HDL) like Verilog/SystemVerilog, UVM methodology, simulation tools, and familiarity with PCIe protocol analyzers is essential. Analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex issues and collaborating with cross-functional teams. These competencies ensure reliable product validation, compliance with industry standards, and efficient project delivery in high-speed interface development.

What are some common challenges faced by PCIe Verification Engineers during the verification process?

PCIe Verification Engineers often encounter challenges such as handling the complexity of the PCIe protocol, ensuring compliance with evolving standards, and debugging intricate issues that arise during simulation. The verification process may involve working with large-scale testbenches, managing interoperability testing with different vendors’ devices, and identifying corner-case bugs. Collaboration with both design and software teams is crucial to resolve issues effectively and ensure robust system-level functionality.

What does a PCIe Verification Engineer do?

A PCIe Verification Engineer is responsible for ensuring that PCI Express (PCIe) hardware and systems function correctly and comply with industry standards. They develop and execute test plans, create verification environments, and use simulation tools to find and resolve design issues. Their work is crucial for validating the performance, reliability, and interoperability of PCIe-based products such as computer motherboards, servers, and storage devices. This role typically requires a strong background in digital design, hardware description languages (HDL), and PCIe protocol knowledge.

What is the difference between Pcie Verification Engineer vs Hardware Verification Engineer?

AspectPcie Verification EngineerHardware Verification Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer Engineering; knowledge of PCIe protocolsBachelor's in Electrical Engineering or Computer Engineering; knowledge of hardware protocols
Work EnvironmentDesign teams, FPGA/ASIC verification labsHardware design and testing labs, FPGA/ASIC environments
Industry UsageSemiconductor, computer hardware, embedded systemsSemiconductor, consumer electronics, aerospace
Common Search/ComparisonYesYes

The Pcie Verification Engineer focuses specifically on verifying PCIe interfaces and protocols within hardware designs, while the Hardware Verification Engineer has a broader scope, testing various hardware components and systems. Both roles require similar technical skills and often work in overlapping environments, but their focus areas differ significantly.

What job categories do people searching Pcie Verification Engineer jobs in Minnesota look for? The top searched job categories for Pcie Verification Engineer jobs in Minnesota are:
What cities in Minnesota are hiring for Pcie Verification Engineer jobs? Cities in Minnesota with the most Pcie Verification Engineer job openings:
VLSI Design Verification Manager - Slingshot ASIC Team

VLSI Design Verification Manager - Slingshot ASIC Team

Hewlett Packard Enterprise

Bloomington, MN

Full-time

Posted 14 days ago


Hewlett Packard Enterprise rating

8.3

Company rating: 8.3 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

30th of 137 rated electronics manufacturers


Job description

VLSI Design Verification Manager - Slingshot ASIC TeamThis role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.Our culture thrives onfinding new and better ways to accelerate what's next.We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs.We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.Open up opportunities with HPE.

Job Description:

Job Description
Hewlett Packard Enterprise is seeking aVLSI Design Verification Managerto lead design verification forSlingshot networking ASICs, the highperformance interconnect used in HPE's flagship HPC and AI supercomputers. HPE Slingshot is a modern, Ethernetbased interconnect purposebuilt for largescale HPC and AI clusters, delivering industryleading bandwidth, low latency, adaptive routing and scalability for demanding workloads. In this role, you will lead a team of design verification engineers responsible for ensuring functional correctness and quality of complex networking ASICs used in NIC and switch products. You will own verification methodology, execution quality, and signoff readiness, while growing and mentoring engineers across a range of experience levels.
This role manages a team of approximately8-15 engineers(TCP01-TCP05)and sits at the intersection of deep technical leadership, people development, and program execution.

Responsibilities

  • Provide leadership and direction for a team responsible for all phases ofpresilicon design verification, including verification planning, testbench development, coverage closure, regression management, and signoff reviews.
  • Define, own, and evolvedesign verification methodology, ensuring consistent, highquality verification practices across block, subsystem, and fullchip scopes.
  • Ensure development of robustSystemVerilog/UVMbased environments, including stimulus, scoreboards, checkers, assertions, and functional coverage.
  • Drive regression health, failure triage, rootcause isolation, and closure of design issues in close collaboration with logic design and architecture teams.
  • Manage project deliverables, schedules, and staffing to meet program milestones and quality goals.
  • Recruit, mentor, and develop engineers; set performance expectations and support career growth across junior through senior levels.
  • Identify and drive opportunities for process improvement, reuse, automation, and efficiency in verification workflows.
  • Communicate verification status, risks, and readiness clearly to management and crossfunctional partners.
Education and Experience Required
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
  • Typically10+ years of experience in VLSI design verification, with strong handson background in presilicon DV.
Required Knowledge and Skills
  • Strong understanding ofSystemVerilog and UVMbased verification methodologies.
  • Demonstratedtechnical leadershipin design verification. (e.g., DV technical lead, block or project verification owner)
  • Ability to lead engineers through influence, technical credibility, mentorship, and clear communication.
  • Experience with verification planning, coveragedriven verification, regression management, and signoff readiness.
  • Proficiency with DV workflows using industry EDA simulation tools.
  • Strong analytical and problemsolving skills.
  • Excellent written and verbal communication skills.
  • Ability to operate effectively in a multisite, crossfunctional engineering environment.
Preferred Knowledge and Skills
  • Previous peoplemanagement experience, including hiring, coaching, and performance management.
  • Direct experience withSynopsys VCSlargescale regression execution, triage workflows, and performance/throughput optimization.
  • Familiarity with GitHub Enterprise Cloud development workflows and AI tools is a plus.
  • Familiarity with highperformance networking, Ethernet, SERDES, PCIe, or HPC/AI systems is a plus.
  • Experience improving verification efficiency through automation, reuse, or methodology refinement.

What We Can Offer You:

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

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Job:

Engineering

Job Level:

Manager_1"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 142,000 - 270,000 in Colorado // 135,000 - 310,500 in Minnesota & Wisconsin
The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

The estimated job application period closure is May 15 2026; this timeline is provided for transparency and internal planning purposes.

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

No Fees Notice & Recruitment Fraud Disclaimer

It has come to HPE's attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates.

Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendorswill never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication.


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