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Smts Silicon Design Engineer Jobs (NOW HIRING)

Altera

FPGA Silicon Design Engineer

San Jose, CA · On-site

$149K - $215K/yr

About the Role Join Altera as an FPGA Silicon Design Engineer focused on RTL design. In this role, you will be responsible for developing high-quality logic designs and RTL implementations for next ...

Micron Technology

SMTS, Design Engineer

San Jose, CA · On-site

$176K - $347K/yr

As a Senior Member of Technical Staff (SMTS) Design Engineer in Micron's NVEG organization, you ... Silicon Validation & Correlation: Partner with Product Engineering to design silicon experiments ...

Micron

SMTS, Design Engineer

San Jose, CA

$176K - $347K/yr

As a Senior Member of Technical Staff (SMTS) Design Engineer in Micron's NVEG organization, you ... Silicon Validation & Correlation: Partner with Product Engineering to design silicon experiments ...

Microsoft

Senior Silicon Design Engineer

Redmond, WA · On-site

$119K - $234K/yr

We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who ...

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How much do smts silicon design engineer jobs pay per year?

As of Aug 2, 2026, the average yearly pay for smts silicon design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an SMTS Silicon Design Engineer, and why are they important?

To thrive as an SMTS Silicon Design Engineer, you need a deep understanding of digital and/or analog circuit design, semiconductor physics, and experience with ASIC or SoC development, usually supported by a degree in electrical or computer engineering. Proficiency in technical tools such as Verilog/VHDL, EDA tools (like Synopsys or Cadence), and simulation software, along with familiarity with industry standards, is crucial. Excellent problem-solving abilities, attention to detail, and effective teamwork and communication skills set standout engineers apart. These competencies ensure the creation of innovative, high-performance silicon solutions that meet stringent design specifications and project timelines.

What are some common challenges faced by SMTS Silicon Design Engineers when working on complex chip architectures?

SMTS Silicon Design Engineers often encounter challenges such as managing high design complexity, meeting aggressive performance and power targets, and ensuring seamless integration of multiple IP blocks. Collaborating closely with verification, software, and physical design teams is essential to address issues early and avoid costly rework. Additionally, staying current with evolving design tools and methodologies helps maintain efficiency and drive innovation in fast-paced project environments.

What is an SMTS Silicon Design Engineer?

An SMTS (Senior Member of Technical Staff) Silicon Design Engineer is a highly experienced professional responsible for designing and developing integrated circuits (ICs) or chips at the silicon level. Their work includes activities such as architecture definition, circuit design, verification, and optimization for performance and power efficiency. SMTS engineers often lead technical projects, mentor junior engineers, and contribute to the overall innovation in semiconductor technology. They typically work for companies in the semiconductor, electronics, or related industries. This role requires deep expertise in hardware design, tools like Verilog or VHDL, and a strong understanding of fabrication processes.
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Infographic showing various Smts Silicon Design Engineer job openings in the United States as of July 2026, with employment types broken down into 88% Full Time, 9% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.

FPGA Silicon Design Engineer

Altera Corporation

San Jose, CA • On-site

$149K - $215K/yr

Full-time

Re-posted 19 days ago

Job description

Job Details:
Job Description:
About Altera
At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
About the Role
Join Altera as an FPGA Silicon Design Engineer focused on RTL design. In this role, you will be responsible for developing high-quality logic designs and RTL implementations for next-generation FPGA products. You will collaborate cross-functionally with architecture, verification, and physical design teams to deliver robust, high-performance silicon solutions. This position plays a critical role in enabling scalable, power-efficient FPGA architectures used across a wide range of applications.
Key Responsibilities
  • Develop logic design, register transfer level (RTL) coding, and simulation for FPGA components including cell libraries, functional units, IP blocks, and subsystems.
  • Participate in defining architecture and microarchitecture features of assigned design blocks.
  • Create prototypes, simulate models, and define system requirements for new designs.
  • Prepare and design logic diagrams and RTL code to implement system design and test specifications.
  • Deliver software models to support device-level bring-up, including functionality, timing, and power characteristics.
  • Apply RTL implementation techniques to meet power, performance, and area (PPA) goals in partnership with physical design teams.
  • Review verification plans and ensure proper implementation to validate design features.
  • Debug failing RTL tests, identify root causes, and implement corrective actions to ensure design correctness.

Salary Range
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$149,100 - $215,925 USD
We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
Qualifications:
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Math, or related field and 8+ years of industry experience in FPGA or ASIC design.
  • 8+ years of experience in RTL design and coding using SystemVerilog and/or Verilog for complex digital systems.
  • 8+ years of experience with programming/scripting languages such as Python for design automation, modeling, or verification support.
  • 8+ years of experience in hardware design concepts including logic design, finite state machines, control units, processor subsystems, and network-on-chip (NoC) architectures.
  • 8+ years of experience using industry-standard front-end design tools and flows, including synthesis, static timing analysis (STA), linting (e.g., SpyGlass), and power domain methodologies.
  • 8+ years of experience collaborating with cross-functional teams (verification, physical design) to achieve power, performance, and area (PPA) targets.

Preferred Qualifications
  • Knowledge of Network-on-Chip (NoC) architectures and control processors.
  • Experience contributing to silicon bring-up or post-silicon validation.
  • Experience or knowledge in FPGA configuration controllers

Job Type:
Regular
Shift:
Shift 1 (United States of America)
Primary Location:
San Jose, California, United States
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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