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Pmts Silicon Design Engineer Jobs (NOW HIRING)

Persimmons

Silicon Design Engineer

San Jose, CA · On-site

As a Persimmons Silicon Design Engineer, you will be responsible for high quality RTL drops to our PD Partners of next-generation AI silicon. Your primary duties and responsibilities include: * Own ...

Persimmons

Silicon Design Engineer

San Jose, CA · On-site

As a Persimmons Silicon Design Engineer, you will be responsible for high quality RTL drops to our PD Partners of next-generation AI silicon. Your primary duties and responsibilities include: * Own ...

Advanced Micro Devices

Silicon Design Engineer

San Jose, CA · On-site

$100 - $150/hr

This is an exciting opportunity to work in the AMD SOC Verification Team as Silicon Design Verification Engineer where you will work with a team and experts in verification. THE PERSON: The candidate ...

Jobtailor

Silicon Design Engineer

San Jose, CA · On-site

$170 - $210/hr

Demonstrated success taking designs from synthesis through tapeout on real silicon * Proficiency in ... Electrical Engineering * Computer Engineering * Design Verification * Quality Checks * Tapeout ...

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Microsoft

Senior Silicon Design Engineer

Redmond, WA · On-site

$119K - $234K/yr

We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who ...

GlobalFoundries inc.

$167 - $275/hr

The PMTS Digital Design Engineer will lead the architecture implementation, microarchitecture ... Support silicon bring-up, debug, characterization, and production ramp activities.Performance ...

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Pmts Silicon Design Engineer information

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$10

$49

$78

How much do pmts silicon design engineer jobs pay per hour?

As of Sep 6, 2026, the average hourly pay for pmts silicon design engineer in the United States is $49.97, according to ZipRecruiter salary data. Most workers in this role earn between $40.87 and $57.21 per hour, depending on experience, location, and employer.

What is a PMTS Silicon Design Engineer?

A PMTS (Principal Member of Technical Staff) Silicon Design Engineer is a senior-level engineer responsible for designing, developing, and verifying integrated circuits (ICs) or silicon chips. They typically lead complex hardware design projects, work on architecture specifications, collaborate with cross-functional teams, and mentor junior engineers. Their role is critical in ensuring that the silicon products meet performance, power, and area requirements while adhering to project timelines and quality standards.

What are the key skills and qualifications needed to thrive as a PMTS Silicon Design Engineer?

To thrive as a PMTS Silicon Design Engineer, you need deep expertise in digital and/or analog circuit design, semiconductor physics, and a relevant engineering degree (such as Electrical or Computer Engineering). Proficiency with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as experience with Verilog/VHDL and silicon verification methodologies, is typically required. Strong problem-solving abilities, teamwork, and effective communication help drive complex projects and facilitate collaboration across multidisciplinary teams. These skills and qualities are crucial for delivering innovative, high-performance silicon solutions that meet strict industry standards.

What are some typical challenges faced by PMTS Silicon Design Engineers during the chip development process?

PMTS Silicon Design Engineers often encounter challenges such as managing complex design specifications, meeting tight project deadlines, and ensuring designs are both power- and area-efficient without sacrificing performance. Collaboration with cross-functional teams—including verification, physical design, and firmware engineers—is crucial to resolve issues efficiently. Additionally, adapting to evolving industry standards and integrating new technologies can require continuous learning and flexibility to ensure successful tape-out and product delivery.

What is the difference between Pmts Silicon Design Engineer vs Pmts ASIC Design Engineer?

AspectPmts Silicon Design EngineerPmts ASIC Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or related field; experience in silicon chip designBachelor's or Master's in Electrical Engineering or related field; specialized ASIC design experience
Work EnvironmentDesign labs, cleanrooms, collaborative teamsDesign offices, simulation labs, cross-functional teams
Industry UsageSemiconductor companies, hardware firmsSemiconductor, consumer electronics, telecommunications

The main difference is that Pmts Silicon Design Engineers focus on designing and developing silicon chips, while Pmts ASIC Design Engineers specialize in creating custom application-specific integrated circuits. Both roles require similar educational backgrounds and work environments, but ASIC design involves more specialized knowledge in custom chip architecture and verification.

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Pmts Silicon Design Engineer jobs near you
Infographic showing various Pmts Silicon Design Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $103,934 per year, or $50 per hour.

Silicon Design Engineer

Advanced Micro Devices, Inc

San Jose, CA • On-site

$145K/yr

Full-time

Re-posted 28 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

26th of 161 rated electronics manufacturers

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we're looking for talent who feel the same: people who want to leave the planet better than they found it, those who don't shy away from humanity's challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you're designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger - technology that moves the world forward.
THE ROLE:
We are seeking a highly motivated Silicon Design Engineer. In this role, you will lead and contribute to the design, integration, verification, and characterization of advanced silicon testchips supporting FPGA and ASIC products on leading-edge process technologies
THE PERSON:
The ideal candidate is a hands-on silicon design engineer with experience across RTL-to-GDS implementation, design verification, and post-silicon validation. You should be comfortable working independently, driving technical challenges to closure, collaborating across teams, delivering successful tapeouts, and communicating effectively in fast-paced environments with a passion for innovation.
KEY RESPONSIBILITIES:
  • Drive the timing-aware/physical-aware synthesis flow using industry-standard tools (e.g., Design Compiler) to generate optimized netlists.
  • Lead the end-to-end digital ASIC/SoC physical design cycle from RTL handoff through GDSII tapeout, including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, timing closure, signal integrity optimization, physical verification, and design signoff.
  • Close SoC timing with Static Timing Analysis (STA) using tools such as PrimeTime to validate setup/hold margins across process, voltage, and temperature (PVT) corners.
  • Drive tapeout readiness by performing physical signoff analyses including IR drop, electromigration (EM), noise, DRC/LVS verification, and cross-functional reviews with RTL, DFT, package, and foundry teams.
  • Develop verification plans and testbenches to validate chip functionality, and generate test patterns for post-silicon validation
  • Assist with post-silicon bring-up, debugging, and lab-based validation activities.

PREFERRED EXPERIENCE:
  • Good understanding of CMOS circuit design fundamentals, semiconductor device physics, signal integrity, power integrity, and device reliability mechanisms.
  • Proven experience delivering silicon across advanced process technologies, including FinFET (7nm/5nm/3nm) and emerging Gate-All-Around (GAA) nodes.
  • Expertise in digital ASIC/SoC implementation flows, including synthesis, floorplanning, power planning, placement, CTS, routing, timing closure, and physical signoff using industry-standard tools (Cadence Genus/Innovus and/or Synopsys Fusion Compiler).
  • Strong understanding of CMOS circuit design fundamentals, semiconductor device physics, signal integrity, power integrity, and device reliability mechanisms.
  • Proven experience delivering silicon across advanced process technologies, including FinFET (7nm/5nm/3nm) and emerging Gate-All-Around (GAA) nodes.
  • Hands-on experience with physical signoff methodologies, including STA, IR drop, electromigration (EM), DRC/LVS, noise analysis, and tapeout qualification.
  • Strong analytical and problem-solving skills, with experience debugging complex design implementation issues and driving cross-functional closure.
  • Experience with silicon bring-up, post-silicon validation, and laboratory test equipment is a plus.
  • Proficiency in Python, Tcl, and shell scripting for automation, flow development, and productivity enhancement.

ACADEMIC CREDENTIALS:
Preferably holds an advanced degree (PhD or MS) in electrical & electronics engineering or physical sciences; alternatively, a bachelor's degree and relevant industry experience is acceptable.
This role is not eligible for visa sponsorship.
#LI-DR2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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