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Pmts Silicon Design Engineer Jobs (NOW HIRING)

About the Role Join Altera as an FPGA Silicon Design Engineer focused on RTL design. In this role, you will be responsible for developing high-quality logic designs and RTL implementations for next ...

During the co-design phase, you will partner with silicon design teams, Business Units, customer ... Collaborate with assembly engineering, internal sites, and OSAT/subcontractor partners to conduct ...

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Pmts Silicon Design Engineer information

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$10

$49

$78

How much do pmts silicon design engineer jobs pay per hour?

As of Jul 28, 2026, the average hourly pay for pmts silicon design engineer in the United States is $49.97, according to ZipRecruiter salary data. Most workers in this role earn between $40.87 and $57.21 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a PMTS Silicon Design Engineer, and why are they important?

To thrive as a PMTS Silicon Design Engineer, you need deep expertise in digital and/or analog circuit design, semiconductor physics, and a relevant engineering degree (such as Electrical or Computer Engineering). Proficiency with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as experience with Verilog/VHDL and silicon verification methodologies, is typically required. Strong problem-solving abilities, teamwork, and effective communication help drive complex projects and facilitate collaboration across multidisciplinary teams. These skills and qualities are crucial for delivering innovative, high-performance silicon solutions that meet strict industry standards.

What is a PMTS Silicon Design Engineer?

A PMTS (Principal Member of Technical Staff) Silicon Design Engineer is a senior-level engineer responsible for designing, developing, and verifying integrated circuits (ICs) or silicon chips. They typically lead complex hardware design projects, work on architecture specifications, collaborate with cross-functional teams, and mentor junior engineers. Their role is critical in ensuring that the silicon products meet performance, power, and area requirements while adhering to project timelines and quality standards.

What is the difference between Pmts Silicon Design Engineer vs Pmts ASIC Design Engineer?

AspectPmts Silicon Design EngineerPmts ASIC Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or related field; experience in silicon chip designBachelor's or Master's in Electrical Engineering or related field; specialized ASIC design experience
Work EnvironmentDesign labs, cleanrooms, collaborative teamsDesign offices, simulation labs, cross-functional teams
Industry UsageSemiconductor companies, hardware firmsSemiconductor, consumer electronics, telecommunications

The main difference is that Pmts Silicon Design Engineers focus on designing and developing silicon chips, while Pmts ASIC Design Engineers specialize in creating custom application-specific integrated circuits. Both roles require similar educational backgrounds and work environments, but ASIC design involves more specialized knowledge in custom chip architecture and verification.

What are some typical challenges faced by PMTS Silicon Design Engineers during the chip development process?

PMTS Silicon Design Engineers often encounter challenges such as managing complex design specifications, meeting tight project deadlines, and ensuring designs are both power- and area-efficient without sacrificing performance. Collaboration with cross-functional teams—including verification, physical design, and firmware engineers—is crucial to resolve issues efficiently. Additionally, adapting to evolving industry standards and integrating new technologies can require continuous learning and flexibility to ensure successful tape-out and product delivery.
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What job categories do people searching Pmts Silicon Design Engineer jobs look for? The top searched job categories for Pmts Silicon Design Engineer jobs are:
Infographic showing various Pmts Silicon Design Engineer job openings in the United States as of July 2026, with employment types broken down into 88% Full Time, 9% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $103,934 per year, or $50 per hour.
FPGA Silicon Design Engineer

FPGA Silicon Design Engineer

Altera Corporation

San Jose, CA • On-site

$149K - $215K/yr

Full-time

Posted 14 days ago


Job description

Job Details:
Job Description:
About Altera
At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
About the Role
Join Altera as an FPGA Silicon Design Engineer focused on RTL design. In this role, you will be responsible for developing high-quality logic designs and RTL implementations for next-generation FPGA products. You will collaborate cross-functionally with architecture, verification, and physical design teams to deliver robust, high-performance silicon solutions. This position plays a critical role in enabling scalable, power-efficient FPGA architectures used across a wide range of applications.
Key Responsibilities
  • Develop logic design, register transfer level (RTL) coding, and simulation for FPGA components including cell libraries, functional units, IP blocks, and subsystems.
  • Participate in defining architecture and microarchitecture features of assigned design blocks.
  • Create prototypes, simulate models, and define system requirements for new designs.
  • Prepare and design logic diagrams and RTL code to implement system design and test specifications.
  • Deliver software models to support device-level bring-up, including functionality, timing, and power characteristics.
  • Apply RTL implementation techniques to meet power, performance, and area (PPA) goals in partnership with physical design teams.
  • Review verification plans and ensure proper implementation to validate design features.
  • Debug failing RTL tests, identify root causes, and implement corrective actions to ensure design correctness.

Salary Range
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$149,100 - $215,925 USD
We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
Qualifications:
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Math, or related field and 8+ years of industry experience in FPGA or ASIC design.
  • 8+ years of experience in RTL design and coding using SystemVerilog and/or Verilog for complex digital systems.
  • 8+ years of experience with programming/scripting languages such as Python for design automation, modeling, or verification support.
  • 8+ years of experience in hardware design concepts including logic design, finite state machines, control units, processor subsystems, and network-on-chip (NoC) architectures.
  • 8+ years of experience using industry-standard front-end design tools and flows, including synthesis, static timing analysis (STA), linting (e.g., SpyGlass), and power domain methodologies.
  • 8+ years of experience collaborating with cross-functional teams (verification, physical design) to achieve power, performance, and area (PPA) targets.

Preferred Qualifications
  • Knowledge of Network-on-Chip (NoC) architectures and control processors.
  • Experience contributing to silicon bring-up or post-silicon validation.
  • Experience or knowledge in FPGA configuration controllers

Job Type:
Regular
Shift:
Shift 1 (United States of America)
Primary Location:
San Jose, California, United States
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.