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Remote Chip Design Jobs (NOW HIRING)

Aalyria

Lead RTL/FPGA Design Engineer

$170K - $195K/yr

This is a remote position that will include occasional travel to our Mountain View office location ... Experience with SoC (System-on-Chip) architectures, including design integration and verification ...

Blue Origin

PLL IC Design Engineer - TeraWave

Seattle, WA · On-site +1

$230K - $322K/yr

A temporary remote work exception is approved while our Bay Area and San Diego sites are being ... Collaborating with RF and SOC system architects and chip leads to define requirements for PLLs and ...

New

Blue Origin

PLL IC Design Engineer - TeraWave

San Diego, CA · On-site +1

$230K - $322K/yr

A temporary remote work exception is approved while our Bay Area and San Diego sites are being ... Collaborating with RF and SOC system architects and chip leads to define requirements for PLLs and ...

New

Cadence Design Systems Inc.

$143K - $266K/yr

Location/s; remote role but must be located in the US. The candidate will have expert knowledge of ... chip level CMOS design concepts desired Strong customer-facing communication and problem-solving ...

Amat

Senior Workplace Design Manager

Santa Clara, CA · On-site +1

$116K - $159K/yr

... every new chip and advanced display in the world. We design, build and service cutting-edge ... This will range from participating as an active member of the onsite project team, to remote ...

Amat

Senior Workplace Design Manager

Phoenix, AZ · On-site +1

$116K - $159K/yr

... every new chip and advanced display in the world. We design, build and service cutting-edge ... This will range from participating as an active member of the onsite project team, to remote ...

Amat

Senior Workplace Design Manager

Austin, TX · On-site +1

$116K - $159K/yr

... every new chip and advanced display in the world. We design, build and service cutting-edge ... This will range from participating as an active member of the onsite project team, to remote ...

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Remote Chip Design information

What are some common challenges faced by professionals working in remote chip design roles, and how can they be managed?

Remote chip design professionals often encounter challenges such as coordinating across time zones, ensuring secure access to proprietary design tools, and maintaining effective communication with cross-functional teams. To manage these, it's important to establish clear collaboration protocols, use secure cloud-based design platforms, and set regular check-ins with team members. Successful remote designers also prioritize documentation and proactive communication to keep projects on track and aligned with overall goals.

What is remote chip design?

Remote chip design refers to the process of designing integrated circuits (ICs) or semiconductor chips while working from a location outside of a traditional office or lab environment. Professionals in this field use specialized software and collaborate with teams online to create, test, and verify chip designs. Advances in cloud-based design tools and secure data sharing have made it possible for engineers to contribute to chip development projects from anywhere in the world. This flexibility allows companies to tap into a global talent pool and enables engineers to maintain a better work-life balance. Remote chip design is becoming increasingly popular in the semiconductor industry.

What is the difference between Remote Chip Design vs Remote ASIC Design?

AspectRemote Chip DesignRemote ASIC Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning integrated circuits, often in collaborative teams, using CAD toolsDesigning custom ASICs, involving detailed specifications and verification processes
Industry UsageSemiconductor companies, hardware firms, tech giantsSemiconductor companies, specialized hardware firms, tech industry
Search & Comparison IntentHigh overlap in skills and tools, often compared for job roles in chip development

Remote Chip Design and Remote ASIC Design share similar educational backgrounds and work environments, focusing on integrated circuit development. While both roles involve hardware design, ASIC Design emphasizes custom chip creation for specific applications, often requiring detailed verification. Candidates should have strong engineering fundamentals and experience with CAD tools. The roles are highly comparable, with differences mainly in project scope and specialization.

What are the key skills and qualifications needed to thrive as a Remote Chip Design Engineer, and why are they important?

To thrive as a Remote Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and a relevant degree such as BSEE or MSEE. Expertise in hardware description languages (HDLs) like Verilog or VHDL, familiarity with EDA tools (e.g., Cadence, Synopsys), and knowledge of FPGA or ASIC workflows are typically required. Strong problem-solving skills, attention to detail, and effective remote communication stand out as vital soft skills for collaborating with distributed teams. These capabilities ensure efficient design cycles, high-quality deliverables, and seamless teamwork in a remote engineering environment.
More about Remote Chip Design jobs
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What job categories do people searching Remote Chip Design jobs look for? The top searched job categories for Remote Chip Design jobs are:
Remote Chip Design jobs near you

Lead RTL/FPGA Design Engineer

Aalyria

Remote

$170K - $195K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 12 hours ago

Job description

About Aalyria:
Aalyria is a leading technology company that supplies laser communications technology and temporospatial software-defined networking platforms to the aerospace industry. With technology acquired from Google, Aalyria is at the forefront of innovation in satellite and airborne mesh networks, as well as cislunar and deep-space communications. We are revolutionizing the orchestration and management of planetary mesh networks using any radio or optical spectrum, any orbit, and any hardware across land, sea, air, and space.
Role Overview:
As the Lead RTL/FPGA Design Engineer on our Aalyria Space team, you will own the end to end the development of a high-performance coherent modem targeting free space optical (FSO) communications. In this role, you'll own the RTL development of that modem from architecture through silicon bring-up. That means translating complex DSP algorithms, equalization, carrier recovery, timing recovery, into clean, synthesizable RTL, integrating high-throughput FEC engines, and ensuring the full design meets the demanding power, performance, and area targets required for a fielded aerospace system. You'll work directly alongside DSP algorithm developers and system architects, serving as the bridge between mathematical models and working hardware.
This is a remote position that will include occasional travel to our Mountain View office location.
Key Responsibilities:
  • Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog.
  • Lead the micro-architecture and RTL development for key digital signal processing (DSP) blocks in the coherent modem, including equalization, carrier recovery, and timing recovery.
  • Oversee the integration of Forward Error Correction (FEC) engines and high-speed interfaces into the overall modem architecture.
  • Collaborate with system architects and DSP algorithm developers to translate DSP algorithm specification/ models into robust RTL designs.
  • Design fixed-point arithmetic RTL implementation of complex DSP blocks.
  • Ensure the design is compliant with relevant industry or company standards and specifications.
  • Apply low power design techniques and perform power, performance, and area (PPA) analysis.
  • Verify intended functionality using thorough test benches, and via vector matching with system models.
  • Support functional verification, debug, and static timing closure.
  • Collaborate closely with firmware/software engineers to define hardware/software partitioning, define registers and interfaces, and support system-level integration and debug.
  • Support silicon bring-up and bench testing.

Required Qualifications:
  • Active Security Clearance, or the eligibility to obtain one.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 5+ years of hands-on experience in RTL design for high-speed digital communications or related systems.
  • Proficiency in logic design concepts and high-quality RTL coding using VDHL/SystemVerilog.
  • Proven experience in micro-architecture definition and delivering detailed design specifications.
  • Demonstrated ability to ensure RTL designs are compliant with relevant industry or company standards and specifications.

Preferred Qualifications:
  • Prior experience delivering an end-to-end FPGA communication system solution (from architecture to successful hardware validation).
  • Deep expertise in implementing complex DSP functions in RTL, such as adaptive equalization, carrier recovery, and timing recovery.
  • Proven experience in the integration of high-throughput FEC engines (e.g., LDPC, Reed-Solomon) into a high-speed data path.
  • Ability to convert system models (e.g., Matlab or C++) into robust fixed-point RTL implementations, including successful vector matching and verification.
  • Familiarity with high-speed ASIC/FPGA synthesis, place and route (P&R), and static timing analysis (STA) flows.
  • Experience in designing for low power and high-speed multi-gigabit/sec interfaces.
  • Exposure to the MAC layer (Media Access Control) or digital interface layers adjacent to the PHY.
  • Experience with Python, Perl, TCL and/or other scripting languages.
  • Experience with SoC (System-on-Chip) architectures, including design integration and verification involving embedded processors (e.g., ARM).
  • Familiarity with defining and implementing hardware/software interface protocols for configuration and control.
  • Prior experience with coherent modem architectures or free space optical (FSO) communications systems is highly desired.

What We Offer:
  • Innovative Environment: Work at a cutting-edge company shaping the future of aerospace communications.
  • Impactful Work: Directly contribute to critical national security programs and initiatives.
  • Growth Opportunities: Expand your career with opportunities for professional development and advancement.
  • Inclusive Culture: Be part of a collaborative, supportive, and inclusive workplace where your contributions matter.
  • Flexibility: Flexible working arrangements including hybrid remote/in-office schedules.
  • Compensation and Equity: Competitive salary, comprehensive benefits (401(k), dental, vision, health, life insurance), paid time off, and equity options.

ITAR/EAR Requirements:
This position involves access to export-controlled information. To comply with U.S. government export regulations, applicants must meet one of the following criteria:
(A) Qualify as a U.S. person, which includes:
  • U.S. citizen or national
  • U.S. lawful permanent resident (green card holder)
  • Refugee under 8 U.S.C. 1157
  • Asylee under 8 U.S.C. 1158

(B) Be eligible to access export-controlled information without requiring an export authorization.
(C) Be eligible and reasonably likely to obtain the necessary export authorization from the appropriate U.S. government agency.
The company reserves the right to decline pursuing an export licensing process for legitimate business-related reasons.
Equal Opportunity Employer Statement:
Aalyria is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. We do not discriminate based on race, color, religion, sex (including pregnancy, gender identity, and sexual orientation), national origin, age, disability status, genetic information, protected veteran status, or any other characteristic protected by law. Qualified applicants from all backgrounds are encouraged to apply.
The pay range for this role is:
170,000 - 195,000 USD per year (Remote (United States))
185,000 - 215,000 USD per year (Remote (San Francisco Bay Area, California))

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