ZipRecruiter

Log In

2

Remote Chip Design Jobs in Texas (NOW HIRING)

Synopsys

Staff Applications Engineer - 18031

Austin, TX · On-site +1

$112K/yr

... Remote Eligible Yes Base Salary Range: $112000 - $168000 Descriptions & Requirements and ... We lead in chip design, verification, and IP integration, empowering the creation of high ...

Curbee

Senior Software Engineer

Dallas, TX · On-site +1

$130K - $170K/yr

S. (Mobile and Remote Service). With Curbee., it's simple: dealerships send the right van to the ... We've also been known to seek out the most killer chocolate chip cookies during our travels. At ...

Curbee

Senior Software Engineer

Dallas, TX · On-site +1

$130K - $170K/yr

S. (Mobile and Remote Service). With Curbee., it's simple: dealerships send the right van to the ... We've also been known to seek out the most killer chocolate chip cookies during our travels. At ...

IC Enable

AMS Verification Engineer

Richardson, TX · On-site +1

$122K/yr

Richardson, TX (Hybrid Schedule, Remote considered based on experience and qualifications) What You ... Support design reviews, silicon readiness, bring-up planning, and product delivery What We're ...

Integra

Director Electrical Engineering

Dallas, TX · On-site +1

Oversee the design, operation, and reliability of utility service entrance systems, high-voltage ... Remote Power Panels (RPPs), busway systems, rack-level electrical distribution, grounding and ...

next page

Showing results 1-20

All JobsChip Design JobsRemote Chip Design JobsRemote Chip Design Jobs in Texas

Remote Chip Design information

What is remote chip design?

Remote chip design refers to the process of designing integrated circuits (ICs) or semiconductor chips while working from a location outside of a traditional office or lab environment. Professionals in this field use specialized software and collaborate with teams online to create, test, and verify chip designs. Advances in cloud-based design tools and secure data sharing have made it possible for engineers to contribute to chip development projects from anywhere in the world. This flexibility allows companies to tap into a global talent pool and enables engineers to maintain a better work-life balance. Remote chip design is becoming increasingly popular in the semiconductor industry.

What are the key skills and qualifications needed to thrive as a remote chip design engineer?

To thrive as a Remote Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and a relevant degree such as BSEE or MSEE. Expertise in hardware description languages (HDLs) like Verilog or VHDL, familiarity with EDA tools (e.g., Cadence, Synopsys), and knowledge of FPGA or ASIC workflows are typically required. Strong problem-solving skills, attention to detail, and effective remote communication stand out as vital soft skills for collaborating with distributed teams. These capabilities ensure efficient design cycles, high-quality deliverables, and seamless teamwork in a remote engineering environment.

What are some common challenges faced by professionals working in remote chip design roles, and how can they be managed?

Remote chip design professionals often encounter challenges such as coordinating across time zones, ensuring secure access to proprietary design tools, and maintaining effective communication with cross-functional teams. To manage these, it's important to establish clear collaboration protocols, use secure cloud-based design platforms, and set regular check-ins with team members. Successful remote designers also prioritize documentation and proactive communication to keep projects on track and aligned with overall goals.

What is the difference between Remote Chip Design vs Remote ASIC Design?

AspectRemote Chip DesignRemote ASIC Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning integrated circuits, often in collaborative teams, using CAD toolsDesigning custom ASICs, involving detailed specifications and verification processes
Industry UsageSemiconductor companies, hardware firms, tech giantsSemiconductor companies, specialized hardware firms, tech industry
Search & Comparison IntentHigh overlap in skills and tools, often compared for job roles in chip development

Remote Chip Design and Remote ASIC Design share similar educational backgrounds and work environments, focusing on integrated circuit development. While both roles involve hardware design, ASIC Design emphasizes custom chip creation for specific applications, often requiring detailed verification. Candidates should have strong engineering fundamentals and experience with CAD tools. The roles are highly comparable, with differences mainly in project scope and specialization.

Is remote chip design a good career?

Remote chip design is a viable career option in the semiconductor industry, offering opportunities for engineers skilled in hardware description languages, circuit design, and simulation tools. It often requires strong technical skills, a relevant degree, and the ability to collaborate virtually with teams. The field is expected to grow with advancements in electronics and integrated circuits, making it a stable career choice for qualified professionals.

What is the salary of remote chip design?

The salary for remote chip design engineers typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior roles or those with specialized skills in FPGA, ASIC, or VHDL may earn higher compensation, often supplemented with bonuses or stock options.

What are the most commonly searched types of Chip Design jobs in Texas?

The most popular types of Chip Design jobs in Texas are:

What are popular job titles related to Remote Chip Design jobs in Texas?

For Remote Chip Design jobs in Texas, the most frequently searched job titles are:

What job categories do people searching Remote Chip Design jobs in Texas look for?

The top searched job categories for Remote Chip Design jobs in Texas are:

What cities in Texas are hiring for Remote Chip Design jobs?

Cities in Texas with the most Remote Chip Design job openings:

Remote Chip Design jobs near you
Infographic showing various Remote Chip Design job openings in Texas as of August 2026, with employment types broken down into 54% Full Time, and 46% Contract. Highlights an 100% Remote job distribution.

High-Speed Analog Layout Design Engineer (remote + travel)

Celero Communications, Inc.

Austin, TX • On-site, Remote

$200K - $300K/yr

Full-time

Posted 2 days ago

New

Job description

Principal High-Speed Analog Layout Design Engineer
About the Role
Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. As we scale rapidly, we are looking for a driven and resourceful High-Speed Analog Layout Engineer to be the backbone of our daily operations and a key partner in shaping our company culture.
 
We are seeking a Principal/Senior Analog Layout Engineer to drive the layout design of complex analog and mixed-signal IP blocks that are at the heart of our advanced optical communication systems. As a key member of the Analog & Mixed-Signal (AMS) design team, you will lead layout development of critical blocks such as ADCs, DACs, PLLs, and other high-performance analog/mixed-signal circuits. You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ensure first-pass silicon success. This is a hands-on technical role ideal for someone who thrives in a fast-paced environment and enjoys mentoring others while contributing directly to cutting-edge chip development.
 
Key Responsibilities
• Lead and own the physical layout design of complex analog/mixed-signal macros (e.g., ADCs, DACs, PLLs), from floor planning through final verification
• Collaborate closely with schematic designers to create optimal layout solutions considering performance, matching, symmetry, and reliability
• Mentor and guide junior layout engineers/contractors across multiple time zones, enforcing best practices in layout design and verification
• Perform and debug full hierarchy LVS, DRC, PERC, ERC, and other signoff checks using industry-standard tools (Pegasus, Calibre, etc.)
• Contribute to chip-level planning including top-level floor planning, block integration, power grid implementation, and signal routing
• Participate in layout design reviews and provide technical leadership for layout quality, verification completeness, and schedule adherence
• Support automation initiatives through scripting and tool customization (SKILL, TCL, Python is a plus)
 
Required Qualifications
• Minimum 10+ years of hands-on analog/mixed-signal layout design experience in advanced CMOS/FinFET technologies
• Proven track record of top level integration IP layout macros and preparing IPs for handoff to Physical Design
• Proven leadership in owning major IP layout macros or full-chip-level layout at FinFET nodes (TSMC preferred)
• At least 1 year of experience with TSMC FinFET process nodes (N3, N5, N7, or N16)
• Deep understanding of device physics, layout-dependent effects (LOD, WPE, OSE, LDE, etc.), and their impact on circuit performance
• Strong expertise in layout best practices for device matching, noise isolation, ESD protection, symmetry, and parasitic minimization
• Proficiency in floor planning, hierarchical block integration, routing strategy, and power/ground grid design
• Expertise with Cadence Virtuoso, Calibre, Pegasus, and other layout and verification tools
• Familiarity with layout verification flows, including LVS, DRC, PERC, Density, DFM, ERC, and Antenna rules
• Experience working in collaborative environments with international and remote teams
• Strong documentation and communication skills with the ability to clearly present layout trade-offs and status to cross-functional teams
• Experience using revision control systems for layout design management
 
Preferred Qualifications
• Exposure to optical or high-speed analog interfaces is a strong plus
• Working knowledge of SKILL, TCL, or Python for layout automation or design flow optimization
• Proven ability to collaborate with international teams (U.S., Canada, Argentina)
• Strong organizational skills with high attention to detail and follow-through
• Ability to multi-task and prioritize in a fast-paced, dynamic environment
• Proactive, eager-to-learn mindset with excellent problem-solving skills
 
What We Offer
• The chance to play a foundational role at a high-growth semiconductor start-up
• Exposure to a wide variety of cross functional teams
• A collaborative, international team culture where ideas and initiative are valued
• The opportunity to grow alongside Celero as we scale and shape the future of our industry
• A foundational role at a fast-growing semiconductor start-up shaping the future of AI and data center connectivity
Annual Base Salary Range for US: $200,000 - $300,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.)