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Asic Engineering Jobs in Texas (NOW HIRING)

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing ...

Principal ASIC Design Engineer

Austin, TX · On-site

$180K - $220K/yr

MS or PhD in Electrical Engineering, or related field. * 10+ years of post-degree experience as a hardware engineer. Qualifications * Have gone through 2 or more complete ASIC design cycles.

ASIC Engineer, Annapurna Labs

Austin, TX · On-site

$164K/yr

We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...

We are seeking a motivated, proactive, and intellectually curiousASIC Engineering ... Experience driving ASIC DFT execution from concept through tapeout * Experience working with ATE ...

We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities ...

ASIC Engineer, Annapurna Labs

Austin, TX · On-site

$164K/yr

We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures ... D. degree in Electrical Engineering or related field - Experience with formal verification ...

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are ... Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or ...

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Asic Engineering information

How much does an ASIC engineer make?

ASIC engineers typically earn a median salary ranging from $100,000 to $150,000 annually, depending on experience, location, and industry. Entry-level positions may start around $80,000, while senior roles with specialized skills in hardware description languages and verification tools can exceed $180,000. Compensation often includes benefits such as bonuses and stock options in technology companies.

What engineer makes $500,000 a year?

In the field of ASIC engineering, senior-level engineers with extensive experience, specialized skills in chip design, and leadership roles can earn salaries approaching or exceeding $500,000 annually, especially in high-cost-of-living areas or within large technology companies. Such compensation often includes bonuses, stock options, and other incentives. Achieving this level typically requires advanced degrees, certifications, and a proven track record of successful projects.

Are ASIC engineers in demand?

ASIC engineers are in high demand due to the growing need for custom integrated circuits in industries like telecommunications, consumer electronics, and automotive. Skills in hardware description languages such as VHDL or Verilog, along with experience in chip design and verification, enhance job prospects in this field.

What does a ASIC engineer do?

An ASIC engineer designs, develops, and tests application-specific integrated circuits used in electronic devices. They work with hardware description languages like VHDL or Verilog, collaborate with cross-functional teams, and ensure the circuits meet performance and power requirements. Proficiency in digital design, simulation tools, and understanding of manufacturing processes are essential for this role.

What is the difference between Asic Engineering vs FPGA Design?

AspectAsic EngineeringFPGA Design
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; often certifications in ASIC designBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; certifications less common
Work EnvironmentDesigning custom chips in semiconductor labs or design houses; involves hardware and software integrationDeveloping programmable logic designs in labs or FPGA development environments; focuses on reconfigurable hardware
Industry UsageUsed in high-volume consumer electronics, telecom, and automotive industries for custom chip solutionsCommon in prototyping, testing, and specialized applications across various industries

Asic Engineering and FPGA Design share foundational knowledge in digital logic and hardware description languages. However, Asic Engineers focus on designing permanent, high-volume chips, while FPGA Designers work with reconfigurable hardware for testing and specialized tasks. Both roles require similar educational backgrounds but differ in application and design processes.

What job categories do people searching Asic Engineering jobs in Texas look for? The top searched job categories for Asic Engineering jobs in Texas are:
What cities in Texas are hiring for Asic Engineering jobs? Cities in Texas with the most Asic Engineering job openings:
ASIC Engineer, Architecture

ASIC Engineer, Architecture

Meta

Austin, TX

$178K/yr

Full-time

Posted 9 days ago


Meta rating

7.5

Company rating: 7.5 out of 10

Based on 44 frontline employees who took The Breakroom Quiz

135th of 209 rated software companies


Job description

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing in performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs designed for Meta's infrastructure. In this role, you will establish the performance modeling methodology and long-term silicon roadmap strategy, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.
ASIC Engineer, Architecture Responsibilities:
  • Define and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environments
  • Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisions
  • Develop and validate pre-silicon performance models that accurately predict post-silicon behavior for data center workloads
  • Develop low-level workloads and kernels for machine learning training and inference applications
  • Establish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipeline
  • Collaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specifications
  • Partner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristics
  • Lead cross-functional technical reviews and communicate performance modeling results and architectural recommendations to engineering leadership
  • Define long-term performance modeling infrastructure roadmaps, including tooling, automation, and simulation platform investments
  • Mentor other engineers on performance modeling techniques, simulation methodology, and microarchitectural analysis best practices
  • Identify and resolve performance gaps between modeled and measured silicon behavior through structured root-cause analysis and model calibration

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 8+ years of experience in ASIC design, silicon engineering, or a related technical field
  • 5+ years of experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs
  • Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools
  • Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems including processors, memory subsystems, or high-speed interconnects
  • Experience with performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon
  • Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams
  • Experience with assembly programming languages, and compiler technologies

Preferred Qualifications:
  • Experience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flows
  • Experience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designs
  • Familiarity with post-silicon performance validation and model-to-hardware correlation methodologies
  • Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis
  • Experience with GPU, machine learning, multi-threaded programming paradigm
  • Experience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimization

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$178,000/year to $250,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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