Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities ... Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and ...
Quick apply
Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities ... Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and ...
Semiconductor Design Expert - AI Hardware
New York, NY · On-site +1
$100/hr
Remote Commitment: 15-20 hours/week Role Responsibilities * Contribute expertise across Analog ... Hands-on ownership of chip blocks/systems through tapeout. * Experience with advanced semiconductor ...
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Semiconductor Design Expert - AI Hardware
New York, NY · On-site +1
$100/hr
Remote Commitment: 15-20 hours/week Role Responsibilities * Contribute expertise across Analog ... Hands-on ownership of chip blocks/systems through tapeout. * Experience with advanced semiconductor ...
Contribute expertise across Analog , Mixed-Signal , RFIC , ASIC , or Physical Design workflows ... Hands-on ownership of chip blocks/systems through tapeout. * Experience with advanced semiconductor ...
Quick apply
Contribute expertise across Analog , Mixed-Signal , RFIC , ASIC , or Physical Design workflows ... Hands-on ownership of chip blocks/systems through tapeout. * Experience with advanced semiconductor ...
Senior ASIC Verification Engineer
New York, NY · On-site +1
We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed ... chip architecture to system performance at scale. At Cornelis we're building the future of AI and ...
Senior ASIC Verification Engineer
New York, NY · On-site +1
We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed ... chip architecture to system performance at scale. At Cornelis we're building the future of AI and ...
Bioinformatician III
Piscataway, NJ · On-site +1
... design and manufacture to our customers including Government funded research, Biotech and large ... RNA-seq, ChIP-seq, ATAC-seq, Hi-C-seq, bisulfite sequencing, whole-genome sequencing) using ...
Bioinformatician III
Piscataway, NJ · On-site +1
... design and manufacture to our customers including Government funded research, Biotech and large ... RNA-seq, ChIP-seq, ATAC-seq, Hi-C-seq, bisulfite sequencing, whole-genome sequencing) using ...
Remote Chip Design information
What are some common challenges faced by professionals working in remote chip design roles, and how can they be managed?
Remote chip design professionals often encounter challenges such as coordinating across time zones, ensuring secure access to proprietary design tools, and maintaining effective communication with cross-functional teams. To manage these, it's important to establish clear collaboration protocols, use secure cloud-based design platforms, and set regular check-ins with team members. Successful remote designers also prioritize documentation and proactive communication to keep projects on track and aligned with overall goals.
What is remote chip design?
Remote chip design refers to the process of designing integrated circuits (ICs) or semiconductor chips while working from a location outside of a traditional office or lab environment. Professionals in this field use specialized software and collaborate with teams online to create, test, and verify chip designs. Advances in cloud-based design tools and secure data sharing have made it possible for engineers to contribute to chip development projects from anywhere in the world. This flexibility allows companies to tap into a global talent pool and enables engineers to maintain a better work-life balance. Remote chip design is becoming increasingly popular in the semiconductor industry.
What is the difference between Remote Chip Design vs Remote ASIC Design?
| Aspect | Remote Chip Design | Remote ASIC Design |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering | Bachelor's or Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Designing integrated circuits, often in collaborative teams, using CAD tools | Designing custom ASICs, involving detailed specifications and verification processes |
| Industry Usage | Semiconductor companies, hardware firms, tech giants | Semiconductor companies, specialized hardware firms, tech industry |
| Search & Comparison Intent | High overlap in skills and tools, often compared for job roles in chip development |
Remote Chip Design and Remote ASIC Design share similar educational backgrounds and work environments, focusing on integrated circuit development. While both roles involve hardware design, ASIC Design emphasizes custom chip creation for specific applications, often requiring detailed verification. Candidates should have strong engineering fundamentals and experience with CAD tools. The roles are highly comparable, with differences mainly in project scope and specialization.
What are the key skills and qualifications needed to thrive as a Remote Chip Design Engineer, and why are they important?
To thrive as a Remote Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and a relevant degree such as BSEE or MSEE. Expertise in hardware description languages (HDLs) like Verilog or VHDL, familiarity with EDA tools (e.g., Cadence, Synopsys), and knowledge of FPGA or ASIC workflows are typically required. Strong problem-solving skills, attention to detail, and effective remote communication stand out as vital soft skills for collaborating with distributed teams. These capabilities ensure efficient design cycles, high-quality deliverables, and seamless teamwork in a remote engineering environment.
What are the most commonly searched types of Chip Design jobs in Rutherford, NJ? The most popular types of Chip Design jobs in Rutherford, NJ are:
What cities near Rutherford, NJ are hiring for Remote Chip Design jobs? Cities near Rutherford, NJ with the most Remote Chip Design job openings:
$175/hr
Full-time
Posted 25 days ago
Be an early applicant
Job description
About the job
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey.
Position: RTL Design Engineers
Type: Contract
Compensation: $100–$175/hour
Location: Remote
Duration: 3+ months
Commitment: 40 hours/week
Role Responsibilities
- Evaluate digital chip design workflows to enhance AI model training and evaluation.
- Design and verify RTL components using Verilog/SystemVerilog.
- Collaborate with architecture, verification, and implementation teams to improve model outputs.
- Develop reusable verification components and testbench infrastructure.
- Leverage LLM-based tools to accelerate chip design and verification processes.
- Work independently and asynchronously to meet project deadlines.
Qualifications
Must-Have
- 3–10 years of experience in digital RTL design or design verification.
- Strong proficiency in Verilog/SystemVerilog and UVM.
- Solid understanding of digital design fundamentals: FSMs, datapaths, pipelines, FIFOs, arbiters, clock/reset domains, bus protocols.
- Experience with ASIC design flows and common EDA tools.
- Ability to write clear design documentation and communicate technical tradeoffs.
Preferred
- Knowledge of AMBA protocols (AXI, AHB, APB).
- Background in CPU, GPU/ML accelerator, networking, memory subsystem, PCIe/high-speed IO, SoC interconnect, low-power design.
- Exposure to formal verification or SV/UVM-based design verification.
Start Date
- Week of 04/23; applications reviewed on a rolling basis.
Compensation & Legal
- Hourly contractor, Paid weekly.
Application Process (Takes 20–30 mins to complete)
- Upload resume
- AI interview based on your resume
- Submit form
Resources & Support
- For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome
- For any help or support, reach out to: support@mercor.com
PS: Our team reviews applications daily. Please complete your AI interview and application steps to be considered for this opportunity.