Intel Construction Jobs (NOW HIRING)

Job Details:Job Description: 

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel

Advanced Packaging / TD is the heart and soul of Moore's Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth. TD's more than 10,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and New Mexico

The process and packaging technology that TD develops is then transferred to Intel's global network of semiconductor fabrication, assembly and test plants.

This role requires regular onsite presence to fulfill essential job responsibilities.

The Inline Wafer Level Assembly (WLA) Defect Metrology Engineer:

• Provides process development direction throughout the whole lifecycle of a technology node by identifying root cause yield limiters.
• Performs statistical analysis, develops visualizations and presentations to construct accurate process development roadmaps that drive technology yield milestones.
• Develops methods, processes, and systems to consolidate and analyze diverse big data sources, establishing optimal methodologies for defect mode understanding and yield modeling, leading to accurate yield Pareto construction and process roadmap definition.
• Organizes, interprets, and structures insights from fab process, defect, and electrical data and detects data anomalies and drives process changes for yield enhancement.
• Extracts insights from structured and unstructured data by quickly synthesizing large volumes of data, and applying statistics, machine learning and coding techniques.
• Develops systems to transform complex experimental and manufacturing data into yield improvement actions using knowledge of product design and test features.
• Ensures manufacturability over process and product design through thorough analysis of process and spec corners and works with design to resolve yield issues before manufacturing ramp.
• Executes new product introductions, enables design technology co-optimization, and participates in design of experiments in factory task forces.
• Creates cross functional collaborations across organizations to debug yield limiters in design, test, and process development areas.
• Develops tools, multivariate algorithms, and methodologies to perform high-volume data analysis to identify root cause yield limiters and identify key process changes to advance yield improvement.
• Performs fault isolation and failure analysis to determine the root cause of failures by evaluating the electrical characteristics of the components using various tools and techniques such as ATE testing, DFx software tools, optical probing, logic/circuit simulation, and emulation, probing, and layout study.
• Develops measurement recipes to provide quick and accurate feedback on product integrity, helping resolve issues with yield or product quality impact.
• Develops and hardens equipment capable of meeting operational and capability needs for leading edge logic node.

The candidate should also exhibit the following behavioral traits and/or skills:

Proactive and willing to work in a dynamic and team-oriented environment.
Enthusiastic collaborator and organizer and a self-starter.
Collaborative and interpersonal skills, willing to influence and motivate others.
Effectively communicate and articulate technical concepts in a clear and concise manner to both line and executive leadership.
Model based problem-solving and root cause analysis skills.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications:

• Bachelor's Degree with 3+ or more years of experience, or a Master's Degree with 1+ years of experience, or a PhD with 6+ years of experience in one of the following fields: Materials Science and Engineering, Mechanical Engineering, Computer Science, Information Systems, Chemical Engineering, Electrical Engineering, Chemistry, Physics, or any other STEM-related discipline.

Experience listed above should be in at least one of the following:

• Experience in applying statistics, analysis to drive yield and/or process improvement.
• Experience with Python.

Preferred Qualifications:

• Experience with enterprise database programs.
• 2+ years' experience with Python.
• Detailed knowledge of substrate and/or assembly and/or fab back-end processes.
• Sense of ownership and experience working with partners to drive yield improvement.
• Prior experience in Defect Reduction, Yield or Module engineering roles.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $115,110.00-219,550.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.