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Freelance Asic Rtl Design Engineer Jobs in Florida

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...

FPGA Design Engineer Staff

Orlando, FL · On-site

$114K - $158K/yr

You will be the FPGA Design Engineer for the Missile & Fire Control (MFC) team at Lockheed Martin ... RTL, constraints and HDL code (VHDL/Verilog). • Performing synthesis, place and route, timing ...

FPGA Design Engineer Sr

Orlando, FL · On-site

$114K - $158K/yr

Create detailed RTL (VHDL/Verilog/SystemVerilog) and accompanying constraints to meet timing, power ... Lead design assurance reviews, prepare verification reports and maintain traceability in GitLab (or ...

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also ... digital design/verification.Experience or coursework with object oriented programming languages.

FPGA Engineer Lead

Orlando, FL · On-site

$121K - $155K/yr

Our team delivers advanced imaging platforms by defining FPGA architectures, developing RTL ... Comprehensive knowledge of the ASIC/FPGA lifecycle: architecture, design, simulation, verification ...

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also ... design/verification. Experience or coursework with object oriented programming languages.

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of ... As a Graphics Core Hardware Verification Engineer, you will be tasked with the following:- Use ...

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of ... Description As a Graphics Core Hardware Verification Engineer, you will be tasked with the ...

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

In this role, you will be leading block and sub-system level pre-silicon RTL verification of ... engineers in delivering well-verified IP. - Collaborate with architecture, design and modeling ...

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

In this role, you will be leading block and sub-system level pre-silicon RTL verification of ... teams of engineers in delivering well-verified IP.- Collaborate with architecture, design and ...

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Freelance Asic Rtl Design Engineer information

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FPGA Engineer (Intern)

$4.3K - $4.8K/wk

Other

Posted 25 days ago


Job description

At Citadel Securities, a leading global market maker, our team of FPGA Engineers work in small teams to create the next generation FPGA solutions to support ultra-low latency trading systems across the firm. FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help optimize trading system performance. As an intern, you’ll get to challenge the impossible in technology through an 11-week program that will allow you to collaborate and connect with senior team members. In addition, you’ll get the opportunity to network and socialize with peers throughout the internship. Your Objectives:

  • Design, implement and test FPGA solutions across Citadel Securities’ trading businesses
  • Improve trading system efficiency and performance to accelerate algorithmic trade signal generation and order execution
  • Work in small teams to build the future of finance

Your Skills & Talents:

  • A deep passion for technology and hardware development
  • Pursuing a Bachelor’s, Master’s or PhD in Electrical Engineering, Computer Engineering or related fields
  • Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus.
  • Experience in one or more of the following areas: Hardware Architecture, Simulation, Systems Integration, Hardware Validation and Testing, FPGA Synthesis, and Static Analysis
  • Strong written and verbal communication skills
  • Intellectual curiosity and passion for solving challenging problems using technology

Opportunities available in New York.

In accordance with applicable law, the base salary range for this role is $4,300 to $4,800 per week.

About Citadel Securities

Citadel Securities is the next-generation capital markets firm and a leading global market maker. We provide institutional and retail investors with the liquidity they need to trade a broad array of equity and fixed income products in any market condition. The brightest minds in finance, science and technology use powerful, advanced analytics to solve the market’s most critical challenges, turning big ideas into real-world outcomes.