Staff RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Quick apply
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Melbourne, FL · On-site
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
Melbourne, FL · On-site
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
Quick apply
Melbourne, FL · On-site
$145K - $175K/yr
ROLE We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
Melbourne, FL · On-site
$114K - $151K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
Melbourne, FL · On-site
$114K - $151K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Orlando, FL · On-site
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced ...
Orlando, FL · On-site
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced ...
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Melbourne, FL · On-site
$114K - $151K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
Melbourne, FL · On-site
$114K - $151K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
$117K - $162K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
$117K - $162K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
$114K - $158K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
$114K - $158K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Orlando, FL · On-site
$114K - $158K/yr
ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift ...
Orlando, FL · On-site
$114K - $158K/yr
ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift ...
Orlando, FL · On-site
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
Orlando, FL · On-site
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
Orlando, FL · On-site
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
Orlando, FL · On-site
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
Analog, Digital, and RF Circuit Design. 6. ASIC DFT Engineer Location: 100% Remote | Status: All Visas Welcome Key Skills: ASIC, Design-for-Test (DFT), SCAN, ATPG.
Analog, Digital, and RF Circuit Design. 6. ASIC DFT Engineer Location: 100% Remote | Status: All Visas Welcome Key Skills: ASIC, Design-for-Test (DFT), SCAN, ATPG.
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Miami, FL · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Miami, FL · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Full-time
Medical, Dental, Vision, Life, Retirement
Posted 18 days ago
Sourced by ZipRecruiter
Computer and electronic product manufacturing
51 - 200 Employees
Redmond, WA, US
1993