3D Physical Design Engineer
$150K - $270K/yr
Strong knowledge of block level and full-chip physical verification methodology. * Expert at optimizing for the best power/performance and area. * Experience with the complete physical design flow.
$150K - $270K/yr
Strong knowledge of block level and full-chip physical verification methodology. * Expert at optimizing for the best power/performance and area. * Experience with the complete physical design flow.
$150K - $270K/yr
Strong knowledge of block level and full-chip physical verification methodology. * Expert at optimizing for the best power/performance and area. * Experience with the complete physical design flow.
$145.20K - $191.60K/yr
Oversee all hardware engineering efforts, setting the vision and strategy for RTL development and chip design, while serving as the primary technical authority for ML engineers learning hardware ...
Quick apply
$145.20K - $191.60K/yr
Oversee all hardware engineering efforts, setting the vision and strategy for RTL development and chip design, while serving as the primary technical authority for ML engineers learning hardware ...
Contribute to end-to-end chip design workflows, from early architecture definition to final tapeout. Partner with cross-functional teams to refine specifications and validate hardware/software ...
Contribute to end-to-end chip design workflows, from early architecture definition to final tapeout. Partner with cross-functional teams to refine specifications and validate hardware/software ...
Signoff is the critical final verification stage in chip design where designs are validated against manufacturing, timing, and power criteria before tapeout. This role focuses on building and ...
Signoff is the critical final verification stage in chip design where designs are validated against manufacturing, timing, and power criteria before tapeout. This role focuses on building and ...
Beaverton, OR · On-site
Collaborate with other team members to integrate the block with the full chip * Use Verilog to design and System Verilog for block level verification * Assist the Verification team in reviewing and ...
Beaverton, OR · On-site
Collaborate with other team members to integrate the block with the full chip * Use Verilog to design and System Verilog for block level verification * Assist the Verification team in reviewing and ...
Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and verify RTL components using Verilog/SystemVerilog . * Collaborate with architecture, verification ...
Quick apply
Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and verify RTL components using Verilog/SystemVerilog . * Collaborate with architecture, verification ...
Austin, TX · On-site
$134.80K - $138.80K/yr
Do you love building intelligent solutions that revolutionize chip design? Do you see the transformative potential of GenAI in physical synthesis workflows? As part of our Silicon Technologies group ...
Austin, TX · On-site
$134.80K - $138.80K/yr
Do you love building intelligent solutions that revolutionize chip design? Do you see the transformative potential of GenAI in physical synthesis workflows? As part of our Silicon Technologies group ...
Signoff is the critical final verification stage in chip design where designs are validated against manufacturing, timing, and power criteria before tapeout. This role focuses on building and ...
Signoff is the critical final verification stage in chip design where designs are validated against manufacturing, timing, and power criteria before tapeout. This role focuses on building and ...
San Jose, CA · On-site
$126.50K - $234.90K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the ...
San Jose, CA · On-site
$126.50K - $234.90K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the ...
$126.50K - $234.90K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the ...
$126.50K - $234.90K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the ...
Architect Labs is a frontier AI lab specializing in chip design, focused on building AI models and tools for custom ASICs at scale. As a Member of the Technical Staff in Applied AI, you'll design AI ...
New
Architect Labs is a frontier AI lab specializing in chip design, focused on building AI models and tools for custom ASICs at scale. As a Member of the Technical Staff in Applied AI, you'll design AI ...
New
In this highly visible role, you will be at the center of a processor design effort interfacing ... As a Full Chip Integration Engineer, you will be participating in the physical design, integration ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... As a Full Chip Integration Engineer, you will be participating in the physical design, integration ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... Description As a Full Chip Integration Engineer, you will be participating in the physical design ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... Description As a Full Chip Integration Engineer, you will be participating in the physical design ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$126.50K - $234.90K/yr
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the brightest ...
$126.50K - $234.90K/yr
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the brightest ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... Description As a Full Chip Integration Engineer, you will be participating in the physical design ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... Description As a Full Chip Integration Engineer, you will be participating in the physical design ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
$147.40K - $272.10K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... As a Full Chip Integration Engineer, you will be participating in the physical design, integration ...
In this highly visible role, you will be at the center of a processor design effort interfacing ... As a Full Chip Integration Engineer, you will be participating in the physical design, integration ...
$42K - $56.5K
4% of jobs
$56.5K - $71K
8% of jobs
$81.6K is the 25th percentile. Wages below this are outliers.
$71K - $85.5K
17% of jobs
The median wage is $99K / yr.
$85.5K - $100K
22% of jobs
$100K - $114.5K
15% of jobs
$114.5K - $129K
6% of jobs
$133.7K is the 75th percentile. Wages above this are outliers.
$129K - $143.5K
7% of jobs
$143.5K - $158K
7% of jobs
$158K - $172.5K
8% of jobs
$172.5K - $187K
2% of jobs
$187K - $201.5K
2% of jobs
$42K
$114.5K
$201.5K

About The Role
As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis. You will work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration.Â
Skills and Qualifications
RequiredÂ
Preferred   Â
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Computer and peripheral equipment manufacturing
201 - 500 Employees
Sunnyvale, CA, US
2015